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Integer_Transition_Systems 2019-03-29 01.54 pair #432276257
details
property
value
status
complete
benchmark
intSqRoot.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n057.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp2019_ITS
runtime (wallclock)
5.29252 seconds
cpu usage
5.2927
user time
4.93622
system time
0.356478
max virtual memory
760904.0
max residence set size
119036.0
stage attributes
key
value
starexec-result
NO
output
5.28/5.28 NO 5.28/5.28 5.28/5.29 Solver Timeout: 4 5.28/5.29 Global Timeout: 300 5.28/5.29 No parsing errors! 5.28/5.29 Init Location: 0 5.28/5.29 Transitions: 5.28/5.29 <l0, l6, true> 5.28/5.29 <l1, l2, true, par{r^0 -> (0 + p^0)}> 5.28/5.29 <l1, l2, true, par{q^0 -> (0 + p^0)}> 5.28/5.29 <l3, l4, ((0 + q^0) <= (1 + r^0))> 5.28/5.29 <l3, l1, ((2 + r^0) <= (0 + q^0)) /\ (undef14 = undef14), par{p^0 -> undef14}> 5.28/5.29 <l2, l3, true> 5.28/5.29 <l5, l2, true, par{q^0 -> (0 + N^0), r^0 -> 1}> 5.28/5.29 <l6, l5, true> 5.28/5.29 5.28/5.29 Fresh variables: 5.28/5.29 undef14, 5.28/5.29 5.28/5.29 Undef variables: 5.28/5.29 undef14, 5.28/5.29 5.28/5.29 Abstraction variables: 5.28/5.29 5.28/5.29 Exit nodes: 5.28/5.29 5.28/5.29 Accepting locations: 5.28/5.29 5.28/5.29 Asserts: 5.28/5.29 5.28/5.29 Preprocessed LLVMGraph 5.28/5.29 Init Location: 0 5.28/5.29 Transitions: 5.28/5.29 <l0, l2, (q^0 = (0 + N^0)) /\ (r^0 = 1)> 5.28/5.29 <l2, l4, ((0 + q^0) <= (1 + r^0))> 5.28/5.29 <l2, l2, ((2 + r^0) <= (0 + q^0)) /\ (undef14 = undef14), par{r^0 -> (0 + undef14)}> 5.28/5.29 <l2, l2, ((2 + r^0) <= (0 + q^0)) /\ (undef14 = undef14), par{q^0 -> (0 + undef14)}> 5.28/5.29 5.28/5.29 Fresh variables: 5.28/5.29 undef14, 5.28/5.29 5.28/5.29 Undef variables: 5.28/5.29 undef14, 5.28/5.29 5.28/5.29 Abstraction variables: 5.28/5.29 5.28/5.29 Exit nodes: 5.28/5.29 5.28/5.29 Accepting locations: 5.28/5.29 5.28/5.29 Asserts: 5.28/5.29 5.28/5.29 ************************************************************* 5.28/5.29 ******************************************************************************************* 5.28/5.29 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 5.28/5.29 ******************************************************************************************* 5.28/5.29 5.28/5.29 Init Location: 0 5.28/5.29 Graph 0: 5.28/5.29 Transitions: 5.28/5.29 Variables: 5.28/5.29 5.28/5.29 Graph 1: 5.28/5.29 Transitions: 5.28/5.29 <l2, l2, 2 + r^0 <= q^0, {r^0 -> undef14, rest remain the same}> 5.28/5.29 <l2, l2, 2 + r^0 <= q^0, {q^0 -> undef14, rest remain the same}> 5.28/5.29 Variables: 5.28/5.29 q^0, r^0 5.28/5.29 5.28/5.29 Graph 2: 5.28/5.29 Transitions: 5.28/5.29 Variables: 5.28/5.29 5.28/5.29 Precedence: 5.28/5.29 Graph 0 5.28/5.29 5.28/5.29 Graph 1 5.28/5.29 <l0, l2, N^0 = q^0 /\ r^0 = 1, {all remain the same}> 5.28/5.29 5.28/5.29 Graph 2 5.28/5.29 <l2, l4, q^0 <= 1 + r^0, {all remain the same}> 5.28/5.29 5.28/5.29 Map Locations to Subgraph: 5.28/5.29 ( 0 , 0 ) 5.28/5.29 ( 2 , 1 ) 5.28/5.29 ( 4 , 2 ) 5.28/5.29 5.28/5.29 ******************************************************************************************* 5.28/5.29 ******************************** CHECKING ASSERTIONS ******************************** 5.28/5.29 ******************************************************************************************* 5.28/5.29 5.28/5.29 Proving termination of subgraph 0 5.28/5.29 Proving termination of subgraph 1 5.28/5.29 Checking unfeasibility... 5.28/5.29 Time used: 0.003231 5.28/5.29 5.28/5.29 Checking conditional termination of SCC {l2}... 5.28/5.29 5.28/5.29 LOG: CALL solveLinear 5.28/5.29
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