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Integer_Transition_Systems 2019-03-29 01.54 pair #432276266
details
property
value
status
complete
benchmark
smagillb-succeed.t2_fixed.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n131.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp2019_ITS
runtime (wallclock)
18.2773 seconds
cpu usage
18.2731
user time
17.2306
system time
1.04245
max virtual memory
969308.0
max residence set size
262224.0
stage attributes
key
value
starexec-result
NO
output
18.21/18.27 NO 18.21/18.27 18.21/18.27 Solver Timeout: 4 18.21/18.27 Global Timeout: 300 18.21/18.27 No parsing errors! 18.21/18.27 Init Location: 0 18.21/18.27 Transitions: 18.21/18.27 <l0, l9, true> 18.21/18.27 <l1, l2, true> 18.21/18.27 <l3, l4, true> 18.21/18.27 <l5, l6, true> 18.21/18.27 <l6, l5, true> 18.21/18.27 <l7, l1, ((0 + ___rho_1_^0) <= 0) /\ ((1 + c^0) <= (0 + curr_serv^0)), par{curr_serv^0 -> (~(1) + curr_serv^0)}> 18.21/18.27 <l7, l1, (1 <= (0 + ___rho_1_^0)), par{c^0 -> (~(1) + c^0), curr_serv^0 -> (~(1) + curr_serv^0), resp^0 -> (1 + resp^0)}> 18.21/18.27 <l2, l7, (1 <= (0 + curr_serv^0)) /\ (undef43 = undef43), par{___rho_1_^0 -> undef43}> 18.21/18.27 <l2, l5, ((0 + curr_serv^0) <= 0)> 18.21/18.27 <l8, l1, (undef63 = undef63) /\ (undef58 = (0 + undef63)) /\ (1 <= (0 + undef58)) /\ (undef61 = undef61) /\ (1 <= (0 + undef61)) /\ (undef62 = undef62) /\ ((1 + (2 * undef62)) <= (0 + undef61)) /\ ((0 + undef61) <= (1 + (2 * undef62))), par{c^0 -> undef58, curr_serv^0 -> (0 + undef61), resp^0 -> 0, servers^0 -> undef61, serversdiv2^0 -> undef62, tmp1^0 -> undef63}> 18.21/18.27 <l9, l8, true> 18.21/18.27 18.21/18.27 Fresh variables: 18.21/18.27 undef43, undef58, undef61, undef62, undef63, 18.21/18.27 18.21/18.27 Undef variables: 18.21/18.27 undef43, undef58, undef61, undef62, undef63, 18.21/18.27 18.21/18.27 Abstraction variables: 18.21/18.27 18.21/18.27 Exit nodes: 18.21/18.27 18.21/18.27 Accepting locations: 18.21/18.27 18.21/18.27 Asserts: 18.21/18.27 18.21/18.27 Preprocessed LLVMGraph 18.21/18.27 Init Location: 0 18.21/18.27 Transitions: 18.21/18.27 <l0, l1, (c^0 = undef58) /\ (curr_serv^0 = (0 + undef61)) /\ (resp^0 = 0) /\ (undef63 = undef63) /\ (undef58 = (0 + undef63)) /\ (1 <= (0 + undef58)) /\ (undef61 = undef61) /\ (1 <= (0 + undef61)) /\ (undef62 = undef62) /\ ((1 + (2 * undef62)) <= (0 + undef61)) /\ ((0 + undef61) <= (1 + (2 * undef62)))> 18.21/18.27 <l1, l1, (1 <= (0 + curr_serv^0)) /\ (undef43 = undef43) /\ ((0 + undef43) <= 0) /\ ((1 + c^0) <= (0 + curr_serv^0)), par{curr_serv^0 -> (~(1) + curr_serv^0)}> 18.21/18.27 <l1, l1, (1 <= (0 + curr_serv^0)) /\ (undef43 = undef43) /\ (1 <= (0 + undef43)), par{c^0 -> (~(1) + c^0), curr_serv^0 -> (~(1) + curr_serv^0), resp^0 -> (1 + resp^0)}> 18.21/18.27 <l1, l5, ((0 + curr_serv^0) <= 0)> 18.21/18.27 <l5, l5, true> 18.21/18.27 18.21/18.27 Fresh variables: 18.21/18.27 undef43, undef58, undef61, undef62, undef63, 18.21/18.27 18.21/18.27 Undef variables: 18.21/18.27 undef43, undef58, undef61, undef62, undef63, 18.21/18.27 18.21/18.27 Abstraction variables: 18.21/18.27 18.21/18.27 Exit nodes: 18.21/18.27 18.21/18.27 Accepting locations: 18.21/18.27 18.21/18.27 Asserts: 18.21/18.27 18.21/18.27 ************************************************************* 18.21/18.27 ******************************************************************************************* 18.21/18.27 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 18.21/18.27 ******************************************************************************************* 18.21/18.27 18.21/18.27 Init Location: 0 18.21/18.27 Graph 0: 18.21/18.27 Transitions: 18.21/18.27 Variables: 18.21/18.27 18.21/18.27 Graph 1: 18.21/18.27 Transitions: 18.21/18.27 <l1, l1, undef43 <= 0 /\ 1 + c^0 <= curr_serv^0 /\ 1 <= curr_serv^0, {curr_serv^0 -> -1 + curr_serv^0, rest remain the same}> 18.21/18.27 <l1, l1, 1 <= curr_serv^0 /\ 1 <= undef43, {c^0 -> -1 + c^0, curr_serv^0 -> -1 + curr_serv^0, resp^0 -> 1 + resp^0, rest remain the same}> 18.21/18.27 Variables: 18.21/18.27 c^0, curr_serv^0, resp^0 18.21/18.27 18.21/18.27 Graph 2: 18.21/18.27 Transitions: 18.21/18.27 <l5, l5, true, {all remain the same}> 18.21/18.27 Variables: 18.21/18.27 18.21/18.27 Precedence: 18.21/18.27 Graph 0 18.21/18.27 18.21/18.27 Graph 1 18.21/18.27 <l0, l1, 1 <= undef58 /\ 1 <= undef61 /\ c^0 = undef58 /\ curr_serv^0 = undef61 /\ resp^0 = 0 /\ undef58 = undef63 /\ undef61 = 1 + 2*undef62, {all remain the same}> 18.21/18.27 18.21/18.27 Graph 2 18.21/18.27 <l1, l5, curr_serv^0 <= 0, {all remain the same}> 18.21/18.27 18.21/18.27 Map Locations to Subgraph: 18.21/18.27 ( 0 , 0 ) 18.21/18.27 ( 1 , 1 ) 18.21/18.27 ( 5 , 2 ) 18.21/18.27 18.21/18.27 ******************************************************************************************* 18.21/18.27 ******************************** CHECKING ASSERTIONS ******************************** 18.21/18.27 ******************************************************************************************* 18.21/18.27 18.21/18.27 Proving termination of subgraph 0 18.21/18.27 Proving termination of subgraph 1 18.21/18.27 Checking unfeasibility... 18.21/18.27 Time used: 0.005984
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