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Integer_Transition_Systems 2019-03-29 01.54 pair #432276272
details
property
value
status
complete
benchmark
6.t2.smt2
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n049.star.cs.uiowa.edu
space
From_T2
run statistics
property
value
solver
VeryMax-termCOMP17
configuration
termcomp2019_ITS
runtime (wallclock)
0.0313489 seconds
cpu usage
0.031513
user time
0.020263
system time
0.01125
max virtual memory
113176.0
max residence set size
23068.0
stage attributes
key
value
starexec-result
NO
output
0.00/0.02 NO 0.00/0.02 0.00/0.02 Solver Timeout: 4 0.00/0.02 Global Timeout: 300 0.00/0.02 No parsing errors! 0.00/0.02 Init Location: 0 0.00/0.02 Transitions: 0.00/0.02 <l0, l6, true> 0.00/0.02 <l1, l2, true, par{pc_Loop^0 -> 2}> 0.00/0.02 <l2, l1, true> 0.00/0.02 <l3, l4, (undef4 = 3), par{pc_Loop^0 -> 2}> 0.00/0.02 <l4, l3, true> 0.00/0.02 <l5, l3, true, par{pc_Loop^0 -> 2}> 0.00/0.02 <l6, l5, true> 0.00/0.02 0.00/0.02 Fresh variables: 0.00/0.02 undef4, 0.00/0.02 0.00/0.02 Undef variables: 0.00/0.02 undef4, 0.00/0.02 0.00/0.02 Abstraction variables: 0.00/0.02 0.00/0.02 Exit nodes: 0.00/0.02 0.00/0.02 Accepting locations: 0.00/0.02 0.00/0.02 Asserts: 0.00/0.02 0.00/0.02 Preprocessed LLVMGraph 0.00/0.02 Init Location: 0 0.00/0.02 Transitions: 0.00/0.02 <l0, l3, true> 0.00/0.02 <l3, l3, (undef4 = 3)> 0.00/0.02 0.00/0.02 Fresh variables: 0.00/0.02 undef4, 0.00/0.02 0.00/0.02 Undef variables: 0.00/0.02 undef4, 0.00/0.02 0.00/0.02 Abstraction variables: 0.00/0.02 0.00/0.02 Exit nodes: 0.00/0.02 0.00/0.02 Accepting locations: 0.00/0.02 0.00/0.02 Asserts: 0.00/0.02 0.00/0.02 ************************************************************* 0.00/0.02 ******************************************************************************************* 0.00/0.02 *********************** WORKING TRANSITION SYSTEM (DAG) *********************** 0.00/0.02 ******************************************************************************************* 0.00/0.02 0.00/0.02 Init Location: 0 0.00/0.02 Graph 0: 0.00/0.02 Transitions: 0.00/0.02 Variables: 0.00/0.02 0.00/0.02 Graph 1: 0.00/0.02 Transitions: 0.00/0.02 <l3, l3, undef4 = 3, {all remain the same}> 0.00/0.03 Variables: 0.00/0.03 0.00/0.03 Precedence: 0.00/0.03 Graph 0 0.00/0.03 0.00/0.03 Graph 1 0.00/0.03 <l0, l3, true, {all remain the same}> 0.00/0.03 0.00/0.03 Map Locations to Subgraph: 0.00/0.03 ( 0 , 0 ) 0.00/0.03 ( 3 , 1 ) 0.00/0.03 0.00/0.03 ******************************************************************************************* 0.00/0.03 ******************************** CHECKING ASSERTIONS ******************************** 0.00/0.03 ******************************************************************************************* 0.00/0.03 0.00/0.03 Proving termination of subgraph 0 0.00/0.03 Proving termination of subgraph 1 0.00/0.03 Checking unfeasibility... 0.00/0.03 Time used: 0.000956 0.00/0.03 0.00/0.03 > No variable changes in termination graph. 0.00/0.03 Checking conditional unfeasibility... 0.00/0.03 Termination failed. Trying to show unreachability... 0.00/0.03 Proving unreachability of entry: <l0, l3, true, {all remain the same}> 0.00/0.03 0.00/0.03 LOG: CALL check - Post:1 <= 0 - Process 1 0.00/0.03 * Exit transition: <l0, l3, true, {all remain the same}> 0.00/0.03 * Postcondition : 1 <= 0 0.00/0.03 0.00/0.03 LOG: CALL solveLinear 0.00/0.03 0.00/0.03 LOG: RETURN solveLinear - Elapsed time: 0.000181s 0.00/0.03 �[31m> Postcondition is not implied!�[0m 0.00/0.03 0.00/0.03 LOG: RETURN check - Elapsed time: 0.000255s 0.00/0.03 Cannot prove unreachability 0.00/0.03
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