details

property	value
status	complete
benchmark	12.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n097.star.cs.uiowa.edu
space	Gebhardt_06

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	6.18051 seconds
cpu usage	21.225
user time	20.2605
system time	0.964504
max virtual memory	7.9704096E7
max residence set size	2615676.0

stage attributes

key	value
starexec-result	NO

output

21.10/6.13 NO 21.10/6.14 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 21.10/6.14 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 21.10/6.14 21.10/6.14 21.10/6.14 Termination w.r.t. Q of the given QTRS could be disproven: 21.10/6.14 21.10/6.14 (0) QTRS 21.10/6.14 (1) NonTerminationProof [COMPLETE, 1009 ms] 21.10/6.14 (2) NO 21.10/6.14 21.10/6.14 21.10/6.14 ---------------------------------------- 21.10/6.14 21.10/6.14 (0) 21.10/6.14 Obligation: 21.10/6.14 Q restricted rewrite system: 21.10/6.14 The TRS R consists of the following rules: 21.10/6.14 21.10/6.14 0(0(0(0(x1)))) -> 0(1(1(1(x1)))) 21.10/6.14 1(0(1(1(x1)))) -> 0(0(1(0(x1)))) 21.10/6.14 21.10/6.14 Q is empty. 21.10/6.14 21.10/6.14 ---------------------------------------- 21.10/6.14 21.10/6.14 (1) NonTerminationProof (COMPLETE) 21.10/6.14 We used the non-termination processor [OPPELT08] to show that the SRS problem is infinite. 21.10/6.14 21.10/6.14 Found the self-embedding DerivationStructure: 21.10/6.14 "0 0 0 0 0 1 1 1 1 0 1 -> 0 0 0 0 0 1 1 1 1 0 1" 21.10/6.14 0 0 0 0 0 1 1 1 1 0 1 -> 0 0 0 0 0 1 1 1 1 0 1 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 0 0 0 0 0 0 1 0 1 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 0 0 0 0 1 0 1 1 1 21.10/6.14 by OverlapClosure OC 2"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 0 0 0 0 1 0 0 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 0 0 1 0 1 1 0 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 1 0 1 1 1 1 0 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 1 0 0 0 0 1 0 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 1 0 0 1 0 1 1 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 1 1 0 1 1 1 1 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 1 1 0 0 0 0 1 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 1 1 0 0 1 0 1 1 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 1 1 1 0 1 1 1 1 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 1 -> 0 0 1 1 1 0 0 0 0 1 0 21.10/6.14 by OverlapClosure OC 2"0 0 0 0 0 1 1 1 1 0 -> 0 0 1 1 1 0 0 1 0 1 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 0 -> 0 0 1 1 1 1 0 1 1 1 21.10/6.14 by OverlapClosure OC 2"0 0 0 0 0 1 1 1 1 -> 0 0 1 1 1 1 0 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 -> 0 0 0 0 0 1 0 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 -> 0 0 0 1 0 1 1 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 -> 0 1 0 1 1 1 1 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 -> 0 1 0 0 0 0 1 0 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 -> 0 1 0 0 1 0 1 1 0 21.10/6.14 by OverlapClosure OC 3"0 0 0 0 0 1 1 1 1 -> 0 1 1 0 1 1 1 1 0 21.10/6.14 by OverlapClosure OC 2"0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)""1 0 1 1 1 1 -> 0 1 1 1 1 0 21.10/6.14 by OverlapClosure OC 3"1 0 1 1 1 1 -> 0 0 0 0 1 0 21.10/6.14 by OverlapClosure OC 2"1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)""""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)"""0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)"""1 0 1 1 -> 0 0 1 0 21.10/6.14 by original rule (OC 1)"""0 0 0 0 -> 0 1 1 1 21.10/6.14 by original rule (OC 1)" 21.10/6.14 21.10/6.14 ---------------------------------------- 21.10/6.14 21.10/6.14 (2) 21.10/6.14 NO 21.10/6.18 EOF popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS_Standard 2019-03-29 03.29