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SRS_Standard 2019-03-29 03.29 pair #432289142
details
property
value
status
complete
benchmark
torpa3.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n089.star.cs.uiowa.edu
space
Secret_05_SRS
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
26.0041 seconds
cpu usage
102.386
user time
89.2906
system time
13.0952
max virtual memory
1.16825744E8
max residence set size
1324000.0
stage attributes
key
value
starexec-result
YES
output
95.22/24.06 YES 95.22/24.06 property Termination 95.22/24.07 has value True 95.22/24.09 for SRS ( [b, b] -> [c, d], [c, c] -> [d, d, d], [c] -> [g], [d, d] -> [c, f], [d, d, d] -> [g, c], [f] -> [a, g], [g] -> [d, a, b], [g, g] -> [b, c]) 95.22/24.09 reason 95.22/24.09 remap for 8 rules 95.22/24.09 property Termination 95.22/24.09 has value True 95.22/24.11 for SRS ( [0, 0] -> [1, 2], [1, 1] -> [2, 2, 2], [1] -> [3], [2, 2] -> [1, 4], [2, 2, 2] -> [3, 1], [4] -> [5, 3], [3] -> [2, 5, 0], [3, 3] -> [0, 1]) 95.22/24.11 reason 95.22/24.11 DP transform 95.22/24.11 property Termination 95.22/24.11 has value True 95.58/24.17 for SRS ( [0, 0] ->= [1, 2], [1, 1] ->= [2, 2, 2], [1] ->= [3], [2, 2] ->= [1, 4], [2, 2, 2] ->= [3, 1], [4] ->= [5, 3], [3] ->= [2, 5, 0], [3, 3] ->= [0, 1], [0#, 0] |-> [1#, 2], [0#, 0] |-> [2#], [1#, 1] |-> [2#, 2, 2], [1#, 1] |-> [2#, 2], [1#, 1] |-> [2#], [1#] |-> [3#], [2#, 2] |-> [1#, 4], [2#, 2] |-> [4#], [2#, 2, 2] |-> [3#, 1], [2#, 2, 2] |-> [1#], [4#] |-> [3#], [3#] |-> [2#, 5, 0], [3#] |-> [0#], [3#, 3] |-> [0#, 1], [3#, 3] |-> [1#]) 95.58/24.17 reason 95.58/24.18 remap for 23 rules 95.58/24.18 property Termination 95.58/24.18 has value True 95.75/24.21 for SRS ( [0, 0] ->= [1, 2], [1, 1] ->= [2, 2, 2], [1] ->= [3], [2, 2] ->= [1, 4], [2, 2, 2] ->= [3, 1], [4] ->= [5, 3], [3] ->= [2, 5, 0], [3, 3] ->= [0, 1], [6, 0] |-> [7, 2], [6, 0] |-> [8], [7, 1] |-> [8, 2, 2], [7, 1] |-> [8, 2], [7, 1] |-> [8], [7] |-> [9], [8, 2] |-> [7, 4], [8, 2] |-> [10], [8, 2, 2] |-> [9, 1], [8, 2, 2] |-> [7], [10] |-> [9], [9] |-> [8, 5, 0], [9] |-> [6], [9, 3] |-> [6, 1], [9, 3] |-> [7]) 95.75/24.21 reason 95.75/24.21 EDG has 1 SCCs 95.75/24.21 property Termination 95.75/24.22 has value True 95.75/24.25 for SRS ( [6, 0] |-> [7, 2], [7] |-> [9], [9, 3] |-> [7], [7, 1] |-> [8], [8, 2, 2] |-> [7], [7, 1] |-> [8, 2], [8, 2, 2] |-> [9, 1], [9, 3] |-> [6, 1], [6, 0] |-> [8], [8, 2] |-> [10], [10] |-> [9], [9] |-> [6], [8, 2] |-> [7, 4], [7, 1] |-> [8, 2, 2], [0, 0] ->= [1, 2], [1, 1] ->= [2, 2, 2], [1] ->= [3], [2, 2] ->= [1, 4], [2, 2, 2] ->= [3, 1], [4] ->= [5, 3], [3] ->= [2, 5, 0], [3, 3] ->= [0, 1]) 95.75/24.25 reason 95.75/24.25 Matrix { monotone = Weak, domain = Arctic, bits = 4, dim = 2, solver = Minisatapi, verbose = False, tracing = True} 95.75/24.25 interpretation 95.75/24.25 0 / 0A 0A \ 95.75/24.25 \ 0A 0A / 95.75/24.25 1 / 0A 0A \ 95.75/24.25 \ 0A 0A / 95.75/24.25 2 / 0A 0A \ 95.75/24.25 \ 0A 0A / 95.75/24.25 3 / 0A 0A \ 95.75/24.25 \ 0A 0A / 95.75/24.25 4 / 0A 0A \ 95.75/24.25 \ -2A -2A / 95.75/24.25 5 / 0A 0A \ 95.75/24.25 \ -2A -2A / 95.75/24.25 6 / 15A 16A \ 95.75/24.25 \ 15A 16A / 95.75/24.25 7 / 15A 16A \ 95.75/24.25 \ 15A 16A / 95.75/24.26 8 / 14A 16A \ 95.75/24.26 \ 14A 16A / 95.75/24.26 9 / 15A 16A \ 95.75/24.26 \ 15A 16A / 95.75/24.26 10 / 16A 16A \ 95.75/24.26 \ 16A 16A / 95.75/24.26 [6, 0] |-> [7, 2] 95.75/24.26 lhs rhs ge gt 95.75/24.26 / 16A 16A \ / 16A 16A \ True False 95.75/24.26 \ 16A 16A / \ 16A 16A / 95.75/24.26 [7] |-> [9] 95.75/24.26 lhs rhs ge gt 95.75/24.26 / 15A 16A \ / 15A 16A \ True False 95.75/24.26 \ 15A 16A / \ 15A 16A / 95.75/24.26 [9, 3] |-> [7] 95.75/24.26 lhs rhs ge gt 95.75/24.26 / 16A 16A \ / 15A 16A \ True False 95.75/24.26 \ 16A 16A / \ 15A 16A / 95.96/24.26 [7, 1] |-> [8] 95.96/24.26 lhs rhs ge gt 95.96/24.26 / 16A 16A \ / 14A 16A \ True False 95.96/24.26 \ 16A 16A / \ 14A 16A / 95.96/24.26 [8, 2, 2] |-> [7] 95.96/24.26 lhs rhs ge gt 95.96/24.26 / 16A 16A \ / 15A 16A \ True False 95.96/24.26 \ 16A 16A / \ 15A 16A / 95.96/24.26 [7, 1] |-> [8, 2] 95.96/24.26 lhs rhs ge gt 95.96/24.26 / 16A 16A \ / 16A 16A \ True False 95.96/24.26 \ 16A 16A / \ 16A 16A / 95.96/24.26 [8, 2, 2] |-> [9, 1] 95.96/24.26 lhs rhs ge gt 95.96/24.26 / 16A 16A \ / 16A 16A \ True False 95.96/24.26 \ 16A 16A / \ 16A 16A / 95.96/24.26 [9, 3] |-> [6, 1] 95.96/24.26 lhs rhs ge gt 95.96/24.26 / 16A 16A \ / 16A 16A \ True False 95.96/24.26 \ 16A 16A / \ 16A 16A / 95.96/24.26 [6, 0] |-> [8] 95.96/24.26 lhs rhs ge gt 95.96/24.26 / 16A 16A \ / 14A 16A \ True False 95.96/24.26 \ 16A 16A / \ 14A 16A / 95.96/24.26 [8, 2] |-> [10] 95.96/24.26 lhs rhs ge gt 95.96/24.26 / 16A 16A \ / 16A 16A \ True False 95.96/24.26 \ 16A 16A / \ 16A 16A / 95.96/24.26 [10] |-> [9] 95.96/24.26 lhs rhs ge gt 95.96/24.26 / 16A 16A \ / 15A 16A \ True False 95.96/24.26 \ 16A 16A / \ 15A 16A / 95.96/24.27 [9] |-> [6] 95.96/24.27 lhs rhs ge gt 95.96/24.27 / 15A 16A \ / 15A 16A \ True False 95.96/24.27 \ 15A 16A / \ 15A 16A / 95.96/24.27 [8, 2] |-> [7, 4] 95.96/24.27 lhs rhs ge gt 95.96/24.28 / 16A 16A \ / 15A 15A \ True True
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