details

property	value
status	complete
benchmark	3.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n070.star.cs.uiowa.edu
space	Mixed_SRS

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	1.6292 seconds
cpu usage	3.45121
user time	3.27435
system time	0.176861
max virtual memory	1.89398E7
max residence set size	269160.0

stage attributes

key	value
starexec-result	YES

output

2.99/1.56 YES 3.41/1.60 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 3.41/1.60 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 3.41/1.60 3.41/1.60 3.41/1.60 Termination w.r.t. Q of the given QTRS could be proven: 3.41/1.60 3.41/1.60 (0) QTRS 3.41/1.60 (1) QTRS Reverse [EQUIVALENT, 0 ms] 3.41/1.60 (2) QTRS 3.41/1.60 (3) RFCMatchBoundsTRSProof [EQUIVALENT, 27 ms] 3.41/1.60 (4) YES 3.41/1.60 3.41/1.60 3.41/1.60 ---------------------------------------- 3.41/1.60 3.41/1.60 (0) 3.41/1.60 Obligation: 3.41/1.60 Q restricted rewrite system: 3.41/1.60 The TRS R consists of the following rules: 3.41/1.60 3.41/1.60 a(a(x1)) -> a(b(a(x1))) 3.41/1.60 b(a(b(x1))) -> a(c(a(x1))) 3.41/1.60 3.41/1.60 Q is empty. 3.41/1.60 3.41/1.60 ---------------------------------------- 3.41/1.60 3.41/1.60 (1) QTRS Reverse (EQUIVALENT) 3.41/1.60 We applied the QTRS Reverse Processor [REVERSE]. 3.41/1.60 ---------------------------------------- 3.41/1.60 3.41/1.60 (2) 3.41/1.60 Obligation: 3.41/1.60 Q restricted rewrite system: 3.41/1.60 The TRS R consists of the following rules: 3.41/1.60 3.41/1.60 a(a(x1)) -> a(b(a(x1))) 3.41/1.60 b(a(b(x1))) -> a(c(a(x1))) 3.41/1.60 3.41/1.60 Q is empty. 3.41/1.60 3.41/1.60 ---------------------------------------- 3.41/1.60 3.41/1.60 (3) RFCMatchBoundsTRSProof (EQUIVALENT) 3.41/1.60 Termination of the TRS R could be shown with a Match Bound [MATCHBOUNDS1,MATCHBOUNDS2] of 5. This implies Q-termination of R. 3.41/1.60 The following rules were used to construct the certificate: 3.41/1.60 3.41/1.60 a(a(x1)) -> a(b(a(x1))) 3.41/1.60 b(a(b(x1))) -> a(c(a(x1))) 3.41/1.60 3.41/1.60 The certificate found is represented by the following graph. 3.41/1.60 The certificate consists of the following enumerated nodes: 3.41/1.60 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46 3.41/1.60 3.41/1.60 Node 17 is start node and node 18 is final node. 3.41/1.60 3.41/1.60 Those nodes are connected through the following edges: 3.41/1.60 3.41/1.60 * 17 to 19 labelled a_1(0)* 17 to 21 labelled a_1(0)* 17 to 27 labelled a_1(1)* 18 to 18 labelled #_1(0)* 19 to 20 labelled b_1(0)* 19 to 25 labelled a_1(1)* 20 to 18 labelled a_1(0)* 20 to 23 labelled a_1(1)* 20 to 29 labelled a_1(2)* 20 to 33 labelled a_1(3)* 21 to 22 labelled c_1(0)* 22 to 18 labelled a_1(0)* 22 to 23 labelled a_1(1)* 22 to 29 labelled a_1(2)* 22 to 33 labelled a_1(3)* 23 to 24 labelled b_1(1)* 23 to 25 labelled a_1(1)* 23 to 31 labelled a_1(2)* 24 to 18 labelled a_1(1)* 24 to 23 labelled a_1(1)* 24 to 29 labelled a_1(2)* 24 to 33 labelled a_1(3)* 25 to 26 labelled c_1(1)* 26 to 18 labelled a_1(1)* 26 to 23 labelled a_1(1)* 26 to 24 labelled a_1(1)* 26 to 29 labelled a_1(2)* 26 to 30 labelled a_1(1)* 26 to 33 labelled a_1(3)* 26 to 34 labelled a_1(1)* 27 to 28 labelled b_1(1)* 28 to 25 labelled a_1(1)* 29 to 30 labelled b_1(2)* 29 to 25 labelled a_1(1)* 29 to 31 labelled a_1(2)* 29 to 37 labelled a_1(3)* 30 to 25 labelled a_1(2)* 30 to 18 labelled a_1(2)* 30 to 23 labelled a_1(2), a_1(1)* 30 to 29 labelled a_1(2)* 30 to 31 labelled a_1(2)* 30 to 33 labelled a_1(3), a_1(2)* 30 to 37 labelled a_1(2)* 31 to 32 labelled c_1(2)* 32 to 24 labelled a_1(2)* 32 to 29 labelled a_1(2)* 32 to 35 labelled a_1(3)* 32 to 30 labelled a_1(2)* 32 to 33 labelled a_1(3)* 32 to 39 labelled a_1(4)* 32 to 34 labelled a_1(2)* 33 to 34 labelled b_1(3)* 34 to 31 labelled a_1(3)* 34 to 37 labelled a_1(3)* 35 to 36 labelled b_1(3)* 35 to 37 labelled a_1(3)* 35 to 25 labelled a_1(1)* 35 to 31 labelled a_1(2)* 35 to 43 labelled a_1(4)* 36 to 29 labelled a_1(3), a_1(2)* 36 to 33 labelled a_1(3)* 36 to 25 labelled a_1(3)* 36 to 18 labelled a_1(3)* 36 to 23 labelled a_1(3), a_1(1)* 36 to 39 labelled a_1(4)* 37 to 38 labelled c_1(3)* 38 to 30 labelled a_1(3)* 38 to 34 labelled a_1(3)* 38 to 35 labelled a_1(3)* 38 to 29 labelled a_1(2)* 38 to 33 labelled a_1(3)* 38 to 41 labelled a_1(4)* 38 to 39 labelled a_1(4)* 38 to 45 labelled a_1(5)* 39 to 40 labelled b_1(4)* 40 to 37 labelled a_1(4)* 40 to 43 labelled a_1(4)* 41 to 42 labelled b_1(4)* 41 to 43 labelled a_1(4)* 42 to 33 labelled a_1(4)* 42 to 31 labelled a_1(4)* 43 to 44 labelled c_1(4)* 44 to 34 labelled a_1(4)* 44 to 41 labelled a_1(4)* 44 to 39 labelled a_1(4)* 44 to 40 labelled a_1(4)* 44 to 45 labelled a_1(5)* 45 to 46 labelled b_1(5)* 46 to 43 labelled a_1(5)* 46 to 37 labelled a_1(5) 3.41/1.60 3.41/1.60 3.41/1.60 ---------------------------------------- 3.41/1.60 3.41/1.60 (4) 3.41/1.60 YES 3.44/1.62 EOF popout

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all output return to SRS_Standard 2019-03-29 03.29