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SRS_Standard 2019-03-29 03.29 pair #432289326
details
property
value
status
complete
benchmark
4.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n159.star.cs.uiowa.edu
space
Mixed_SRS
run statistics
property
value
solver
ttt2-1.19
configuration
ttt2
runtime (wallclock)
5.0171 seconds
cpu usage
18.5441
user time
17.3368
system time
1.20731
max virtual memory
3629292.0
max residence set size
92544.0
stage attributes
key
value
starexec-result
YES
output
18.35/5.00 YES 18.35/5.01 18.35/5.01 Problem: 18.35/5.01 a(b(a(a(a(a(b(x1))))))) -> b(a(a(a(a(b(b(a(a(a(a(b(a(x1))))))))))))) 18.35/5.01 18.35/5.01 Proof: 18.35/5.01 Bounds Processor: 18.35/5.01 bound: 3 18.35/5.01 enrichment: match 18.35/5.01 automaton: 18.35/5.01 final states: {1} 18.35/5.01 transitions: 18.35/5.01 b1(55) -> 56* 18.35/5.01 b1(50) -> 51* 18.35/5.01 b1(35) -> 36* 18.35/5.01 b1(30) -> 31* 18.35/5.01 b1(147) -> 148* 18.35/5.01 b1(142) -> 143* 18.35/5.01 b1(97) -> 98* 18.35/5.01 b1(92) -> 93* 18.35/5.01 b1(49) -> 50* 18.35/5.01 b1(44) -> 45* 18.35/5.01 b1(91) -> 92* 18.35/5.01 b1(86) -> 87* 18.35/5.01 b1(41) -> 42* 18.35/5.01 b1(36) -> 37* 18.35/5.01 b1(153) -> 154* 18.35/5.01 b1(148) -> 149* 18.35/5.01 a1(45) -> 46* 18.35/5.01 a1(40) -> 41* 18.35/5.01 a1(152) -> 153* 18.35/5.01 a1(87) -> 88* 18.35/5.01 a1(52) -> 53* 18.35/5.01 a1(47) -> 48* 18.35/5.01 a1(37) -> 38* 18.35/5.01 a1(32) -> 33* 18.35/5.01 a1(149) -> 150* 18.35/5.01 a1(144) -> 145* 18.35/5.01 a1(94) -> 95* 18.35/5.01 a1(89) -> 90* 18.35/5.01 a1(54) -> 55* 18.35/5.01 a1(39) -> 40* 18.35/5.01 a1(34) -> 35* 18.35/5.01 a1(29) -> 30* 18.35/5.01 a1(151) -> 152* 18.35/5.01 a1(146) -> 147* 18.35/5.01 a1(141) -> 142* 18.35/5.01 a1(96) -> 97* 18.35/5.01 a1(51) -> 52* 18.35/5.01 a1(46) -> 47* 18.35/5.01 a1(31) -> 32* 18.35/5.01 a1(143) -> 144* 18.35/5.01 a1(93) -> 94* 18.35/5.01 a1(88) -> 89* 18.35/5.01 a1(53) -> 54* 18.35/5.01 a1(48) -> 49* 18.35/5.01 a1(43) -> 44* 18.35/5.01 a1(38) -> 39* 18.35/5.01 a1(33) -> 34* 18.35/5.01 a1(150) -> 151* 18.35/5.01 a1(145) -> 146* 18.35/5.01 a1(95) -> 96* 18.35/5.01 a1(90) -> 91* 18.35/5.01 a1(85) -> 86* 18.35/5.01 b2(167) -> 168* 18.35/5.01 b2(162) -> 163* 18.35/5.01 b2(259) -> 260* 18.35/5.01 b2(254) -> 255* 18.35/5.01 b2(209) -> 210* 18.35/5.01 b2(204) -> 205* 18.35/5.01 b2(433) -> 434* 18.35/5.01 b2(428) -> 429* 18.35/5.01 b2(161) -> 162* 18.35/5.01 b2(156) -> 157* 18.35/5.01 b2(111) -> 112* 18.35/5.01 b2(106) -> 107* 18.35/5.01 b2(203) -> 204* 18.35/5.01 b2(198) -> 199* 18.35/5.01 b2(265) -> 266* 18.35/5.01 b2(260) -> 261* 18.35/5.01 b2(427) -> 428* 18.35/5.01 b2(422) -> 423* 18.35/5.01 b2(105) -> 106* 18.35/5.01 b2(100) -> 101* 18.35/5.01 a2(262) -> 263* 18.35/5.01 a2(257) -> 258* 18.35/5.01 a2(429) -> 430* 18.35/5.01 a2(424) -> 425* 18.35/5.01 a2(207) -> 208* 18.35/5.01 a2(202) -> 203* 18.35/5.01 a2(197) -> 198* 18.35/5.01 a2(157) -> 158* 18.35/5.01 a2(107) -> 108* 18.35/5.01 a2(102) -> 103* 18.35/5.01 a2(264) -> 265* 18.35/5.01 a2(431) -> 432* 18.35/5.01 a2(426) -> 427* 18.35/5.01 a2(421) -> 422* 18.35/5.01 a2(199) -> 200* 18.35/5.01 a2(164) -> 165*
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