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SRS_Standard 2019-03-29 03.29 pair #432289550
details
property
value
status
complete
benchmark
size-12-alpha-3-num-503.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n045.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
11.4966 seconds
cpu usage
45.3717
user time
40.436
system time
4.93567
max virtual memory
1.16819596E8
max residence set size
755888.0
stage attributes
key
value
starexec-result
YES
output
44.76/11.32 YES 44.76/11.32 property Termination 44.76/11.32 has value True 44.76/11.32 for SRS ( [a, a] -> [b, b, b, c], [b, c, b] -> [a, b, c]) 44.76/11.32 reason 44.76/11.32 remap for 2 rules 44.76/11.32 property Termination 44.76/11.32 has value True 44.76/11.32 for SRS ( [0, 0] -> [1, 1, 1, 2], [1, 2, 1] -> [0, 1, 2]) 44.76/11.32 reason 44.76/11.32 DP transform 44.76/11.32 property Termination 44.76/11.32 has value True 44.76/11.32 for SRS ( [0, 0] ->= [1, 1, 1, 2], [1, 2, 1] ->= [0, 1, 2], [0#, 0] |-> [1#, 1, 1, 2], [0#, 0] |-> [1#, 1, 2], [0#, 0] |-> [1#, 2], [1#, 2, 1] |-> [0#, 1, 2], [1#, 2, 1] |-> [1#, 2]) 44.76/11.32 reason 44.76/11.32 remap for 7 rules 44.76/11.32 property Termination 44.76/11.32 has value True 44.76/11.32 for SRS ( [0, 0] ->= [1, 1, 1, 2], [1, 2, 1] ->= [0, 1, 2], [3, 0] |-> [4, 1, 1, 2], [3, 0] |-> [4, 1, 2], [3, 0] |-> [4, 2], [4, 2, 1] |-> [3, 1, 2], [4, 2, 1] |-> [4, 2]) 44.76/11.32 reason 44.76/11.32 EDG has 1 SCCs 44.76/11.32 property Termination 44.76/11.32 has value True 44.76/11.32 for SRS ( [3, 0] |-> [4, 1, 1, 2], [4, 2, 1] |-> [4, 2], [4, 2, 1] |-> [3, 1, 2], [3, 0] |-> [4, 2], [3, 0] |-> [4, 1, 2], [0, 0] ->= [1, 1, 1, 2], [1, 2, 1] ->= [0, 1, 2]) 44.76/11.32 reason 44.76/11.32 Matrix { monotone = Weak, domain = Arctic, bits = 4, dim = 2, solver = Minisatapi, verbose = False, tracing = True} 44.76/11.32 interpretation 44.76/11.32 0 / 0A 0A \ 44.76/11.32 \ -2A 0A / 44.76/11.32 1 / 0A 0A \ 44.76/11.32 \ -2A -2A / 44.76/11.32 2 / 0A 0A \ 44.76/11.32 \ 0A 0A / 44.76/11.32 3 / 20A 20A \ 44.76/11.32 \ 20A 20A / 44.76/11.32 4 / 19A 20A \ 44.76/11.32 \ 19A 20A / 44.76/11.32 [3, 0] |-> [4, 1, 1, 2] 44.76/11.32 lhs rhs ge gt 44.76/11.32 / 20A 20A \ / 19A 19A \ True True 44.76/11.32 \ 20A 20A / \ 19A 19A / 44.76/11.32 [4, 2, 1] |-> [4, 2] 44.76/11.32 lhs rhs ge gt 44.76/11.32 / 20A 20A \ / 20A 20A \ True False 44.76/11.32 \ 20A 20A / \ 20A 20A / 44.76/11.32 [4, 2, 1] |-> [3, 1, 2] 44.76/11.32 lhs rhs ge gt 44.76/11.32 / 20A 20A \ / 20A 20A \ True False 44.76/11.32 \ 20A 20A / \ 20A 20A / 44.76/11.32 [3, 0] |-> [4, 2] 44.76/11.32 lhs rhs ge gt 44.76/11.32 / 20A 20A \ / 20A 20A \ True False 44.76/11.32 \ 20A 20A / \ 20A 20A / 44.76/11.32 [3, 0] |-> [4, 1, 2] 44.76/11.32 lhs rhs ge gt 44.76/11.32 / 20A 20A \ / 19A 19A \ True True 44.76/11.32 \ 20A 20A / \ 19A 19A / 44.76/11.32 [0, 0] ->= [1, 1, 1, 2] 44.76/11.32 lhs rhs ge gt 44.76/11.32 / 0A 0A \ / 0A 0A \ True False 44.76/11.32 \ -2A 0A / \ -2A -2A / 44.76/11.32 [1, 2, 1] ->= [0, 1, 2] 44.76/11.32 lhs rhs ge gt 44.76/11.32 / 0A 0A \ / 0A 0A \ True False 44.76/11.32 \ -2A -2A / \ -2A -2A / 44.76/11.32 property Termination 44.76/11.32 has value True 44.76/11.33 for SRS ( [4, 2, 1] |-> [4, 2], [4, 2, 1] |-> [3, 1, 2], [3, 0] |-> [4, 2], [0, 0] ->= [1, 1, 1, 2], [1, 2, 1] ->= [0, 1, 2]) 44.76/11.33 reason 44.76/11.33 EDG has 1 SCCs 44.76/11.33 property Termination 44.76/11.33 has value True 44.76/11.33 for SRS ( [4, 2, 1] |-> [4, 2], [4, 2, 1] |-> [3, 1, 2], [3, 0] |-> [4, 2], [0, 0] ->= [1, 1, 1, 2], [1, 2, 1] ->= [0, 1, 2]) 44.76/11.33 reason 44.76/11.33 Matrix { monotone = Weak, domain = Arctic, bits = 4, dim = 5, solver = Minisatapi, verbose = False, tracing = True} 44.76/11.33 interpretation 44.76/11.33 0 / 0A 0A 0A 5A 5A \ 44.76/11.33 | 0A 0A 0A 5A 5A | 44.76/11.33 | 0A 0A 0A 5A 5A | 44.76/11.33 | 0A 0A 0A 0A 5A | 44.76/11.33 \ -5A -5A -5A 0A 0A / 44.76/11.33 1 / 0A 0A 0A 0A 5A \ 44.76/11.33 | 0A 0A 0A 0A 5A | 44.76/11.33 | 0A 0A 0A 0A 5A | 44.76/11.33 | -5A 0A 0A 0A 0A | 44.76/11.33 \ -5A -5A 0A 0A 0A / 44.76/11.33 2 / 0A 0A 0A 0A 0A \ 44.76/11.33 | -5A -5A 0A 0A 0A | 44.76/11.33 | -5A -5A -5A -5A 0A | 44.76/11.33 | -5A -5A -5A -5A 0A | 44.76/11.33 \ -5A -5A -5A -5A 0A / 44.76/11.33 3 / 1A 1A 1A 2A 3A \ 44.76/11.33 | 1A 1A 1A 2A 3A | 44.76/11.33 | 1A 1A 1A 2A 3A | 44.76/11.33 | 1A 1A 1A 2A 3A | 44.76/11.33 \ 1A 1A 1A 2A 3A / 44.76/11.33 4 / 1A 1A 1A 1A 3A \ 44.76/11.33 | 1A 1A 1A 1A 3A | 44.76/11.33 | 1A 1A 1A 1A 3A | 44.76/11.33 | 1A 1A 1A 1A 3A |
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