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SRS_Standard 2019-03-29 03.29 pair #432289754
details
property
value
status
complete
benchmark
size-12-alpha-3-num-271.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n128.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
16.4253 seconds
cpu usage
64.8398
user time
57.6725
system time
7.16733
max virtual memory
1.16954772E8
max residence set size
588808.0
stage attributes
key
value
starexec-result
YES
output
63.99/16.21 YES 63.99/16.21 property Termination 63.99/16.21 has value True 63.99/16.21 for SRS ( [a] -> [], [a, b] -> [c, a], [c, c] -> [c, b, c, b, a]) 63.99/16.21 reason 63.99/16.21 remap for 3 rules 63.99/16.21 property Termination 63.99/16.21 has value True 63.99/16.21 for SRS ( [0] -> [], [0, 1] -> [2, 0], [2, 2] -> [2, 1, 2, 1, 0]) 63.99/16.21 reason 63.99/16.21 reverse each lhs and rhs 63.99/16.21 property Termination 63.99/16.21 has value True 63.99/16.21 for SRS ( [0] -> [], [1, 0] -> [0, 2], [2, 2] -> [0, 1, 2, 1, 2]) 63.99/16.21 reason 63.99/16.21 DP transform 63.99/16.21 property Termination 63.99/16.21 has value True 63.99/16.21 for SRS ( [0] ->= [], [1, 0] ->= [0, 2], [2, 2] ->= [0, 1, 2, 1, 2], [1#, 0] |-> [0#, 2], [1#, 0] |-> [2#], [2#, 2] |-> [0#, 1, 2, 1, 2], [2#, 2] |-> [1#, 2, 1, 2], [2#, 2] |-> [2#, 1, 2], [2#, 2] |-> [1#, 2]) 63.99/16.21 reason 63.99/16.21 remap for 9 rules 63.99/16.21 property Termination 63.99/16.21 has value True 63.99/16.21 for SRS ( [0] ->= [], [1, 0] ->= [0, 2], [2, 2] ->= [0, 1, 2, 1, 2], [3, 0] |-> [4, 2], [3, 0] |-> [5], [5, 2] |-> [4, 1, 2, 1, 2], [5, 2] |-> [3, 2, 1, 2], [5, 2] |-> [5, 1, 2], [5, 2] |-> [3, 2]) 63.99/16.21 reason 63.99/16.21 weights 63.99/16.21 Map [(3, 1/2), (5, 1/2)] 63.99/16.21 63.99/16.21 property Termination 63.99/16.21 has value True 64.24/16.25 for SRS ( [0] ->= [], [1, 0] ->= [0, 2], [2, 2] ->= [0, 1, 2, 1, 2], [3, 0] |-> [5], [5, 2] |-> [3, 2, 1, 2], [5, 2] |-> [5, 1, 2], [5, 2] |-> [3, 2]) 64.24/16.25 reason 64.24/16.25 EDG has 1 SCCs 64.24/16.25 property Termination 64.24/16.25 has value True 64.24/16.25 for SRS ( [3, 0] |-> [5], [5, 2] |-> [3, 2], [5, 2] |-> [5, 1, 2], [5, 2] |-> [3, 2, 1, 2], [0] ->= [], [1, 0] ->= [0, 2], [2, 2] ->= [0, 1, 2, 1, 2]) 64.24/16.25 reason 64.24/16.25 Matrix { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False} 64.24/16.25 interpretation 64.24/16.25 0 Wk / 0A - 1A 3A \ 64.24/16.25 | 1A 0A 2A 3A | 64.24/16.25 | - - 0A 3A | 64.24/16.25 \ - - - 0A / 64.24/16.25 1 Wk / - 1A - 0A \ 64.24/16.25 | - 2A - 2A | 64.24/16.25 | - 0A - - | 64.24/16.25 \ - - - 0A / 64.24/16.25 2 Wk / 0A 0A 3A - \ 64.24/16.25 | - - 0A - | 64.24/16.25 | 1A - 2A 3A | 64.24/16.25 \ - - - 0A / 64.24/16.25 3 Wk / - 1A - 1A \ 64.24/16.25 | - - - - | 64.24/16.25 | 3A - - 0A | 64.24/16.25 \ - - - 0A / 64.24/16.25 5 Wk / 0A 0A 0A 1A \ 64.24/16.25 | - - - - | 64.24/16.25 | 3A - 4A 4A | 64.24/16.25 \ - - - 0A / 64.24/16.25 [3, 0] |-> [5] 64.24/16.25 lhs rhs ge gt 64.24/16.25 Wk / 2A 1A 3A 4A \ Wk / 0A 0A 0A 1A \ True False 64.24/16.25 | - - - - | | - - - - | 64.24/16.25 | 3A - 4A 6A | | 3A - 4A 4A | 64.24/16.25 \ - - - 0A / \ - - - 0A / 64.24/16.25 [5, 2] |-> [3, 2] 64.24/16.26 lhs rhs ge gt 64.24/16.26 Wk / 1A 0A 3A 3A \ Wk / - - 1A 1A \ True False 64.24/16.26 | - - - - | | - - - - | 64.24/16.26 | 5A 3A 6A 7A | | 3A 3A 6A 0A | 64.24/16.26 \ - - - 0A / \ - - - 0A / 64.24/16.26 [5, 2] |-> [5, 1, 2] 64.24/16.26 lhs rhs ge gt 64.24/16.26 Wk / 1A 0A 3A 3A \ Wk / - - 2A 2A \ True True 64.24/16.26 | - - - - | | - - - - | 64.24/16.26 | 5A 3A 6A 7A | | - - 4A 4A | 64.24/16.26 \ - - - 0A / \ - - - 0A / 64.24/16.26 [5, 2] |-> [3, 2, 1, 2] 64.24/16.26 lhs rhs ge gt 64.24/16.26 Wk / 1A 0A 3A 3A \ Wk / - - 1A 1A \ True False 64.24/16.26 | - - - - | | - - - - | 64.24/16.26 | 5A 3A 6A 7A | | - - 6A 5A | 64.24/16.26 \ - - - 0A / \ - - - 0A / 64.24/16.26 [0] ->= [] 64.24/16.26 lhs rhs ge gt 64.24/16.26 Wk / 0A - 1A 3A \ Wk / 0A - - - \ True False 64.24/16.26 | 1A 0A 2A 3A | | - 0A - - | 64.24/16.26 | - - 0A 3A | | - - 0A - | 64.24/16.26 \ - - - 0A / \ - - - 0A / 64.24/16.26 [1, 0] ->= [0, 2] 64.24/16.26 lhs rhs ge gt 64.24/16.26 Wk / 2A 1A 3A 4A \ Wk / 2A 0A 3A 4A \ True False 64.24/16.26 | 3A 2A 4A 5A | | 3A 1A 4A 5A | 64.24/16.26 | 1A 0A 2A 3A | | 1A - 2A 3A | 64.24/16.26 \ - - - 0A / \ - - - 0A / 64.24/16.26 [2, 2] ->= [0, 1, 2, 1, 2] 64.24/16.26 lhs rhs ge gt 64.24/16.26 Wk / 4A 0A 5A 6A \ Wk / - - 1A 3A \ True False 64.24/16.26 | 1A - 2A 3A | | - - 2A 3A | 64.24/16.26 | 3A 1A 4A 5A | | - - 0A 3A |
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