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SRS_Standard 2019-03-29 03.29 pair #432289856
details
property
value
status
complete
benchmark
size-12-alpha-3-num-4.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n046.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
25.3191 seconds
cpu usage
100.074
user time
86.6425
system time
13.4311
max virtual memory
1.17097024E8
max residence set size
1040144.0
stage attributes
key
value
starexec-result
YES
output
97.61/24.67 YES 97.61/24.67 property Termination 97.61/24.67 has value True 97.61/24.67 for SRS ( [a] -> [], [a] -> [b], [a, b] -> [b, c], [c, c] -> [a, c, a]) 97.61/24.67 reason 97.61/24.67 remap for 4 rules 97.61/24.67 property Termination 97.61/24.67 has value True 97.61/24.69 for SRS ( [0] -> [], [0] -> [1], [0, 1] -> [1, 2], [2, 2] -> [0, 2, 0]) 97.61/24.69 reason 97.61/24.69 DP transform 97.61/24.69 property Termination 97.61/24.69 has value True 98.24/24.82 for SRS ( [0] ->= [], [0] ->= [1], [0, 1] ->= [1, 2], [2, 2] ->= [0, 2, 0], [0#, 1] |-> [2#], [2#, 2] |-> [0#, 2, 0], [2#, 2] |-> [2#, 0], [2#, 2] |-> [0#]) 98.24/24.82 reason 98.24/24.83 remap for 8 rules 98.24/24.83 property Termination 98.24/24.85 has value True 98.49/24.89 for SRS ( [0] ->= [], [0] ->= [1], [0, 1] ->= [1, 2], [2, 2] ->= [0, 2, 0], [3, 1] |-> [4], [4, 2] |-> [3, 2, 0], [4, 2] |-> [4, 0], [4, 2] |-> [3]) 98.49/24.89 reason 98.49/24.90 EDG has 1 SCCs 98.49/24.90 property Termination 98.49/24.90 has value True 98.49/24.93 for SRS ( [3, 1] |-> [4], [4, 2] |-> [3], [4, 2] |-> [4, 0], [4, 2] |-> [3, 2, 0], [0] ->= [], [0] ->= [1], [0, 1] ->= [1, 2], [2, 2] ->= [0, 2, 0]) 98.49/24.93 reason 98.49/24.95 Matrix { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False} 98.49/24.95 interpretation 98.84/24.97 0 Wk / 0A 0A - 0A \ 98.84/24.97 | - 0A 0A 0A | 98.84/24.97 | 1A 2A 3A 4A | 98.84/24.97 \ - - - 0A / 98.84/24.99 1 Wk / - - - 0A \ 98.84/24.99 | - - - 0A | 98.84/24.99 | 1A 2A 0A 4A | 98.84/24.99 \ - - - 0A / 98.96/25.00 2 Wk / 3A 3A 2A - \ 98.96/25.00 | 2A 3A 1A 4A | 98.96/25.00 | 4A 3A 0A 4A | 98.96/25.00 \ - - - 0A / 98.96/25.00 3 Wk / 0A 0A 2A 2A \ 98.96/25.00 | - - - - | 98.96/25.00 | - - - - | 98.96/25.00 \ - - - 0A / 98.96/25.00 4 Wk / 3A - - 6A \ 98.96/25.00 | - - - - | 98.96/25.00 | - - - - | 98.96/25.00 \ - - - 0A / 98.96/25.00 [3, 1] |-> [4] 98.96/25.00 lhs rhs ge gt 98.96/25.00 Wk / 3A 4A 2A 6A \ Wk / 3A - - 6A \ True False 98.96/25.00 | - - - - | | - - - - | 98.96/25.00 | - - - - | | - - - - | 98.96/25.00 \ - - - 0A / \ - - - 0A / 98.96/25.00 [4, 2] |-> [3] 98.96/25.01 lhs rhs ge gt 98.96/25.01 Wk / 6A 6A 5A 6A \ Wk / 0A 0A 2A 2A \ True True 98.96/25.01 | - - - - | | - - - - | 98.96/25.01 | - - - - | | - - - - | 98.96/25.01 \ - - - 0A / \ - - - 0A / 98.96/25.01 [4, 2] |-> [4, 0] 98.96/25.01 lhs rhs ge gt 98.96/25.01 Wk / 6A 6A 5A 6A \ Wk / 3A 3A - 6A \ True False 98.96/25.01 | - - - - | | - - - - | 98.96/25.01 | - - - - | | - - - - | 98.96/25.01 \ - - - 0A / \ - - - 0A / 98.96/25.01 [4, 2] |-> [3, 2, 0] 98.96/25.01 lhs rhs ge gt 98.96/25.01 Wk / 6A 6A 5A 6A \ Wk / 6A 6A 5A 6A \ True False 98.96/25.01 | - - - - | | - - - - | 98.96/25.01 | - - - - | | - - - - | 98.96/25.01 \ - - - 0A / \ - - - 0A / 98.96/25.01 [0] ->= [] 98.96/25.01 lhs rhs ge gt 98.96/25.01 Wk / 0A 0A - 0A \ Wk / 0A - - - \ True False 98.96/25.01 | - 0A 0A 0A | | - 0A - - | 98.96/25.01 | 1A 2A 3A 4A | | - - 0A - | 98.96/25.01 \ - - - 0A / \ - - - 0A / 98.96/25.01 [0] ->= [1] 98.96/25.01 lhs rhs ge gt 98.96/25.01 Wk / 0A 0A - 0A \ Wk / - - - 0A \ True False 98.96/25.01 | - 0A 0A 0A | | - - - 0A | 98.96/25.01 | 1A 2A 3A 4A | | 1A 2A 0A 4A | 98.96/25.01 \ - - - 0A / \ - - - 0A / 98.96/25.01 [0, 1] ->= [1, 2] 98.96/25.01 lhs rhs ge gt 98.96/25.01 Wk / - - - 0A \ Wk / - - - 0A \ True False 98.96/25.01 | 1A 2A 0A 4A | | - - - 0A | 98.96/25.01 | 4A 5A 3A 7A | | 4A 5A 3A 6A | 98.96/25.01 \ - - - 0A / \ - - - 0A / 98.96/25.01 [2, 2] ->= [0, 2, 0] 98.96/25.01 lhs rhs ge gt 98.96/25.01 Wk / 6A 6A 5A 7A \ Wk / 3A 4A 5A 6A \ True False 98.96/25.01 | 5A 6A 4A 7A | | 4A 4A 4A 5A | 98.96/25.01 | 7A 7A 6A 7A | | 7A 7A 6A 7A | 98.96/25.01 \ - - - 0A / \ - - - 0A / 98.96/25.01 property Termination 98.96/25.01 has value True 98.96/25.02 for SRS ( [3, 1] |-> [4], [4, 2] |-> [4, 0], [4, 2] |-> [3, 2, 0], [0] ->= [], [0] ->= [1], [0, 1] ->= [1, 2], [2, 2] ->= [0, 2, 0]) 98.96/25.02 reason 98.96/25.02 EDG has 1 SCCs
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