details

property	value
status	complete
benchmark	size-12-alpha-3-num-270.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n002.star.cs.uiowa.edu
space	Waldmann_07_size12

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	10.7213 seconds
cpu usage	38.4351
user time	36.9255
system time	1.50964
max virtual memory	3.9645496E7
max residence set size	4089680.0

stage attributes

key	value
starexec-result	NO

output

38.13/10.53 NO 38.13/10.53 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 38.13/10.53 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 38.13/10.53 38.13/10.53 38.13/10.53 Termination w.r.t. Q of the given QTRS could be disproven: 38.13/10.53 38.13/10.53 (0) QTRS 38.13/10.53 (1) NonTerminationProof [COMPLETE, 2140 ms] 38.13/10.53 (2) NO 38.13/10.53 38.13/10.53 38.13/10.53 ---------------------------------------- 38.13/10.53 38.13/10.53 (0) 38.13/10.53 Obligation: 38.13/10.53 Q restricted rewrite system: 38.13/10.53 The TRS R consists of the following rules: 38.13/10.53 38.13/10.53 a(x1) -> x1 38.13/10.53 a(b(x1)) -> c(a(x1)) 38.13/10.53 c(c(x1)) -> b(b(c(b(a(x1))))) 38.13/10.53 38.13/10.53 Q is empty. 38.13/10.53 38.13/10.53 ---------------------------------------- 38.13/10.53 38.13/10.53 (1) NonTerminationProof (COMPLETE) 38.13/10.53 We used the non-termination processor [OPPELT08] to show that the SRS problem is infinite. 38.13/10.53 38.13/10.53 Found the self-embedding DerivationStructure: 38.13/10.53 "a b b b c b b b c -> b b c b c b b c b a b b b c b b b c b" 38.13/10.53 a b b b c b b b c -> b b c b c b b c b a b b b c b b b c b 38.13/10.53 by OverlapClosure OC 3"a b b b c b b b c -> b b c b c b b c b a b b b c b a b b c b 38.13/10.53 by OverlapClosure OC 2"a b b b c -> b b c b c b b c b a b a 38.13/10.53 by OverlapClosure OC 3"a b b b c -> b b c b c c c b a 38.13/10.53 by OverlapClosure OC 3"a b b b c -> b b c b c a b c b a 38.13/10.53 by OverlapClosure OC 3"a b b b c -> b b c b a b b c b a 38.13/10.53 by OverlapClosure OC 2"a b b -> b b c b a a 38.13/10.53 by OverlapClosure OC 3"a b b -> c c a 38.13/10.53 by OverlapClosure OC 2"a b -> c a 38.13/10.53 by original rule (OC 1)""a b -> c a 38.13/10.53 by original rule (OC 1)"""c c -> b b c b a 38.13/10.53 by original rule (OC 1)"""a b c -> b b c b a 38.13/10.53 by OverlapClosure OC 2"a b -> c 38.13/10.53 by OverlapClosure OC 2"a b -> c a 38.13/10.53 by original rule (OC 1)""a -> 38.13/10.53 by original rule (OC 1)"""c c -> b b c b a 38.13/10.53 by original rule (OC 1)""""a b -> c a 38.13/10.53 by original rule (OC 1)"""a b -> c 38.13/10.53 by OverlapClosure OC 2"a b -> c a 38.13/10.53 by original rule (OC 1)""a -> 38.13/10.53 by original rule (OC 1)""""c c -> b b c b a 38.13/10.53 by original rule (OC 1)"""a b b b c -> b b c b a b b c b 38.13/10.53 by OverlapClosure OC 2"a b b -> b b c b a a 38.13/10.53 by OverlapClosure OC 3"a b b -> c c a 38.13/10.53 by OverlapClosure OC 2"a b -> c a 38.13/10.53 by original rule (OC 1)""a b -> c a 38.13/10.53 by original rule (OC 1)"""c c -> b b c b a 38.13/10.53 by original rule (OC 1)"""a b c -> b b c b 38.13/10.53 by OverlapClosure OC 2"a b -> c 38.13/10.53 by OverlapClosure OC 2"a b -> c a 38.13/10.53 by original rule (OC 1)""a -> 38.13/10.53 by original rule (OC 1)"""c c -> b b c b 38.13/10.53 by OverlapClosure OC 2"c c -> b b c b a 38.13/10.53 by original rule (OC 1)""a -> 38.13/10.53 by original rule (OC 1)""""""a -> 38.13/10.53 by original rule (OC 1)" 38.13/10.53 38.13/10.53 ---------------------------------------- 38.13/10.53 38.13/10.53 (2) 38.13/10.53 NO 38.40/10.72 EOF popout

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all output return to SRS_Standard 2019-03-29 03.29