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SRS_Standard 2019-03-29 03.29 pair #432290060
details
property
value
status
complete
benchmark
size-12-alpha-3-num-563.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n155.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
54.6814 seconds
cpu usage
216.13
user time
194.443
system time
21.6873
max virtual memory
1.17169032E8
max residence set size
1464692.0
stage attributes
key
value
starexec-result
YES
output
215.86/54.51 YES 215.86/54.51 property Termination 215.86/54.51 has value True 215.86/54.51 for SRS ( [a, b] -> [], [a, c] -> [c, c, b, a], [b, c] -> [a, b]) 215.86/54.51 reason 215.86/54.51 remap for 3 rules 215.86/54.51 property Termination 215.86/54.51 has value True 215.86/54.51 for SRS ( [0, 1] -> [], [0, 2] -> [2, 2, 1, 0], [1, 2] -> [0, 1]) 215.86/54.51 reason 215.86/54.52 DP transform 215.86/54.52 property Termination 215.86/54.52 has value True 215.86/54.52 for SRS ( [0, 1] ->= [], [0, 2] ->= [2, 2, 1, 0], [1, 2] ->= [0, 1], [0#, 2] |-> [1#, 0], [0#, 2] |-> [0#], [1#, 2] |-> [0#, 1], [1#, 2] |-> [1#]) 215.86/54.52 reason 215.86/54.52 remap for 7 rules 215.86/54.52 property Termination 215.86/54.52 has value True 215.86/54.52 for SRS ( [0, 1] ->= [], [0, 2] ->= [2, 2, 1, 0], [1, 2] ->= [0, 1], [3, 2] |-> [4, 0], [3, 2] |-> [3], [4, 2] |-> [3, 1], [4, 2] |-> [4]) 215.86/54.52 reason 215.86/54.52 EDG has 1 SCCs 215.86/54.52 property Termination 215.86/54.52 has value True 215.86/54.52 for SRS ( [3, 2] |-> [4, 0], [4, 2] |-> [4], [4, 2] |-> [3, 1], [3, 2] |-> [3], [0, 1] ->= [], [0, 2] ->= [2, 2, 1, 0], [1, 2] ->= [0, 1]) 215.86/54.52 reason 215.86/54.52 Matrix { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False} 215.86/54.52 interpretation 215.86/54.52 0 Wk / - 0A - 0A \ 215.86/54.52 | - - 0A 2A | 215.86/54.52 | 0A - 2A 1A | 215.86/54.52 \ - - - 0A / 215.86/54.52 1 Wk / - - 0A 2A \ 215.86/54.52 | 0A - - - | 215.86/54.52 | - 0A - 0A | 215.86/54.52 \ - - - 0A / 215.86/54.52 2 Wk / - 0A - 2A \ 215.86/54.52 | - 2A 0A 2A | 215.86/54.52 | 0A 4A 2A 4A | 215.86/54.52 \ - - - 0A / 215.86/54.52 3 Wk / - - 1A 4A \ 215.86/54.52 | - - 3A 7A | 215.86/54.52 | - - - - | 215.86/54.52 \ - - - 0A / 215.86/54.52 4 Wk / 0A 2A 1A - \ 215.86/54.52 | - 5A - 6A | 215.86/54.52 | - - - - | 215.86/54.52 \ - - - 0A / 215.86/54.52 [3, 2] |-> [4, 0] 215.86/54.52 lhs rhs ge gt 215.86/54.52 Wk / 1A 5A 3A 5A \ Wk / 1A 0A 3A 4A \ True False 215.86/54.52 | 3A 7A 5A 7A | | - - 5A 7A | 215.86/54.52 | - - - - | | - - - - | 215.86/54.52 \ - - - 0A / \ - - - 0A / 215.86/54.52 [4, 2] |-> [4] 215.86/54.52 lhs rhs ge gt 215.86/54.52 Wk / 1A 5A 3A 5A \ Wk / 0A 2A 1A - \ True True 215.86/54.52 | - 7A 5A 7A | | - 5A - 6A | 215.86/54.52 | - - - - | | - - - - | 215.86/54.52 \ - - - 0A / \ - - - 0A / 215.86/54.52 [4, 2] |-> [3, 1] 215.86/54.52 lhs rhs ge gt 215.86/54.52 Wk / 1A 5A 3A 5A \ Wk / - 1A - 4A \ True False 215.86/54.52 | - 7A 5A 7A | | - 3A - 7A | 215.86/54.52 | - - - - | | - - - - | 215.86/54.52 \ - - - 0A / \ - - - 0A / 215.86/54.52 [3, 2] |-> [3] 215.86/54.52 lhs rhs ge gt 215.86/54.52 Wk / 1A 5A 3A 5A \ Wk / - - 1A 4A \ True False 215.86/54.52 | 3A 7A 5A 7A | | - - 3A 7A | 215.86/54.52 | - - - - | | - - - - | 215.86/54.52 \ - - - 0A / \ - - - 0A / 215.86/54.52 [0, 1] ->= [] 215.86/54.52 lhs rhs ge gt 215.86/54.52 Wk / 0A - - 0A \ Wk / 0A - - - \ True False 215.86/54.52 | - 0A - 2A | | - 0A - - | 215.86/54.52 | - 2A 0A 2A | | - - 0A - | 215.86/54.52 \ - - - 0A / \ - - - 0A / 215.86/54.52 [0, 2] ->= [2, 2, 1, 0] 215.86/54.52 lhs rhs ge gt 215.86/54.52 Wk / - 2A 0A 2A \ Wk / - 2A 0A 2A \ True False 215.86/54.52 | 0A 4A 2A 4A | | 0A 4A 2A 4A | 215.86/54.52 | 2A 6A 4A 6A | | 2A 6A 4A 6A | 215.86/54.52 \ - - - 0A / \ - - - 0A / 215.86/54.52 [1, 2] ->= [0, 1] 215.86/54.52 lhs rhs ge gt 215.86/54.52 Wk / 0A 4A 2A 4A \ Wk / 0A - - 0A \ True False 215.86/54.52 | - 0A - 2A | | - 0A - 2A | 215.86/54.52 | - 2A 0A 2A | | - 2A 0A 2A | 215.86/54.52 \ - - - 0A / \ - - - 0A / 215.86/54.52 property Termination 215.86/54.52 has value True 215.86/54.52 for SRS ( [3, 2] |-> [4, 0], [4, 2] |-> [3, 1], [3, 2] |-> [3], [0, 1] ->= [], [0, 2] ->= [2, 2, 1, 0], [1, 2] ->= [0, 1]) 215.86/54.52 reason 215.86/54.52 EDG has 1 SCCs 215.86/54.52 property Termination 215.86/54.52 has value True 215.86/54.52 for SRS ( [3, 2] |-> [4, 0], [4, 2] |-> [3, 1], [3, 2] |-> [3], [0, 1] ->= [], [0, 2] ->= [2, 2, 1, 0], [1, 2] ->= [0, 1]) 215.86/54.52 reason 215.86/54.52 Matrix { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False} 215.86/54.52 interpretation
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