details

property	value
status	complete
benchmark	size-12-alpha-3-num-272.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n159.star.cs.uiowa.edu
space	Waldmann_07_size12

run statistics

property	value
solver	matchbox-2019-03-17
configuration	std.sh
runtime (wallclock)	8.00707 seconds
cpu usage	31.3904
user time	27.3196
system time	4.07086
max virtual memory	1.16752008E8
max residence set size	817160.0

stage attributes

key	value
starexec-result	NO

output

24.80/6.30 NO 24.80/6.30 property Termination 24.80/6.30 has value False 24.80/6.30 for SRS ( [a] -> [], [a, b] -> [c, a, a], [c, c] -> [b, c, b, a]) 24.80/6.30 reason 24.80/6.30 remap for 3 rules 24.80/6.30 property Termination 24.80/6.30 has value False 24.80/6.30 for SRS ( [0] -> [], [0, 1] -> [2, 0, 0], [2, 2] -> [1, 2, 1, 0]) 24.80/6.30 reason 24.80/6.30 looping SRS derivation 24.80/6.30 Closure source : aaaaacc 24.80/6.30 target : bcbcabcbcaaaaaccaaa 24.80/6.30 steps : 36 24.80/6.30 strict : True 24.80/6.30 last_rule_app_source : 0 24.80/6.31 last_rule_app_target : 15 24.80/6.31 reason : Overlap (Inside 15) 24.80/6.31 Overlap (Inside 16) 24.80/6.31 Overlap (Inside 14) 24.80/6.31 Overlap (Inside 16) 24.80/6.31 Overlap (Inside 8) 24.80/6.31 Overlap (Inside 5) 24.80/6.31 Overlap (Inside 6) 24.80/6.31 Overlap (Inside 6) 24.80/6.31 Overlap (Inside 5) 24.80/6.31 Overlap (Inside 3) 24.80/6.31 Overlap (Inside 5) 24.80/6.31 Overlap (Inside 0) 24.80/6.32 Overlap (Inside 1) 24.80/6.32 Overlap (Inside 1) 24.80/6.32 Overlap (Left 1) 24.80/6.32 Overlap (Inside 4) 24.80/6.32 Overlap (Inside 4) 24.80/6.32 Overlap (Inside 4) 24.80/6.32 Overlap (Inside 3) 24.80/6.32 Overlap (Inside 0) 24.80/6.32 Overlap (Inside 1) 24.80/6.32 Overlap (Inside 1) 24.80/6.32 Overlap (Left 1) 24.80/6.32 Overlap (Inside 0) 24.80/6.32 Overlap (Inside 1) 24.80/6.32 Overlap (Inside 1) 24.80/6.32 Overlap (Left 1) 24.80/6.32 Overlap (Inside 0) 24.80/6.32 Overlap (Inside 1) 24.80/6.33 Overlap (Inside 1) 24.80/6.33 Overlap (Left 1) 24.80/6.33 Overlap (Inside 0) 24.80/6.33 Overlap (Inside 1) 24.80/6.33 Overlap (Inside 1) 24.80/6.33 Overlap (Left 1) 24.80/6.33 Rule 2 24.80/6.33 Rule 1 24.80/6.33 Rule 0 24.80/6.33 Rule 0 24.80/6.33 Rule 2 24.80/6.33 Rule 1 24.80/6.33 Rule 0 24.80/6.34 Rule 0 24.80/6.34 Rule 2 24.80/6.34 Rule 1 24.80/6.34 Rule 0 24.80/6.34 Rule 0 24.80/6.34 Rule 2 24.80/6.34 Rule 1 24.80/6.34 Rule 0 24.80/6.34 Rule 0 24.80/6.35 Rule 2 24.80/6.35 Rule 1 24.80/6.35 Rule 0 24.80/6.35 Rule 0 24.80/6.35 Rule 1 24.80/6.35 Rule 1 24.80/6.35 Rule 0 24.80/6.35 Rule 0 24.80/6.35 Rule 2 24.80/6.36 Rule 2 24.80/6.36 Rule 1 24.80/6.36 Rule 1 24.80/6.36 Rule 0 24.80/6.36 Rule 0 24.80/6.36 Rule 2 24.80/6.36 Rule 1 24.80/6.36 Rule 0 24.80/6.36 Rule 1 24.80/6.36 Rule 1 24.80/6.36 Rule 0 24.80/6.36 25.15/6.36 25.15/6.36 ************************************************** 25.15/6.36 summary 25.15/6.36 ************************************************** 25.15/6.36 SRS with 3 rules on 3 letters Remap { tracing = False} 25.15/6.36 SRS with 3 rules on 3 letters looping SRS derivation 25.15/6.37 Closure source : aaaaacc 25.15/6.37 target : bcbcabcbcaaaaaccaaa 25.15/6.37 steps : 36 25.15/6.37 strict : True 25.15/6.37 last_rule_app_source : 0 popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS_Standard 2019-03-29 03.29