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SRS_Standard 2019-03-29 03.29 pair #432290534
details
property
value
status
complete
benchmark
size-12-alpha-3-num-470.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n160.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
16.5858 seconds
cpu usage
65.4105
user time
58.3175
system time
7.09296
max virtual memory
1.1702236E8
max residence set size
798940.0
stage attributes
key
value
starexec-result
YES
output
64.73/16.44 YES 64.73/16.44 property Termination 64.73/16.44 has value True 64.73/16.44 for SRS ( [a, a] -> [], [b, b] -> [a, b, c], [c, c] -> [b, b, b]) 64.73/16.44 reason 64.73/16.44 remap for 3 rules 64.73/16.44 property Termination 64.73/16.44 has value True 64.73/16.44 for SRS ( [0, 0] -> [], [1, 1] -> [0, 1, 2], [2, 2] -> [1, 1, 1]) 64.73/16.44 reason 64.73/16.44 DP transform 64.73/16.44 property Termination 64.73/16.44 has value True 64.73/16.44 for SRS ( [0, 0] ->= [], [1, 1] ->= [0, 1, 2], [2, 2] ->= [1, 1, 1], [1#, 1] |-> [0#, 1, 2], [1#, 1] |-> [1#, 2], [1#, 1] |-> [2#], [2#, 2] |-> [1#, 1, 1], [2#, 2] |-> [1#, 1], [2#, 2] |-> [1#]) 64.73/16.44 reason 64.73/16.44 remap for 9 rules 64.73/16.44 property Termination 64.73/16.44 has value True 64.73/16.44 for SRS ( [0, 0] ->= [], [1, 1] ->= [0, 1, 2], [2, 2] ->= [1, 1, 1], [3, 1] |-> [4, 1, 2], [3, 1] |-> [3, 2], [3, 1] |-> [5], [5, 2] |-> [3, 1, 1], [5, 2] |-> [3, 1], [5, 2] |-> [3]) 64.73/16.44 reason 64.73/16.44 weights 64.73/16.44 Map [(3, 1/1), (5, 1/1)] 64.73/16.44 64.73/16.44 property Termination 64.73/16.44 has value True 64.73/16.44 for SRS ( [0, 0] ->= [], [1, 1] ->= [0, 1, 2], [2, 2] ->= [1, 1, 1], [3, 1] |-> [3, 2], [3, 1] |-> [5], [5, 2] |-> [3, 1, 1], [5, 2] |-> [3, 1], [5, 2] |-> [3]) 64.73/16.44 reason 64.73/16.44 EDG has 1 SCCs 64.73/16.44 property Termination 64.73/16.44 has value True 64.73/16.44 for SRS ( [3, 1] |-> [3, 2], [3, 1] |-> [5], [5, 2] |-> [3], [5, 2] |-> [3, 1], [5, 2] |-> [3, 1, 1], [0, 0] ->= [], [1, 1] ->= [0, 1, 2], [2, 2] ->= [1, 1, 1]) 64.73/16.44 reason 64.73/16.44 Matrix { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False} 64.73/16.44 interpretation 64.73/16.45 0 Wk / 0A - - 0A \ 64.73/16.45 | - - 0A - | 64.73/16.45 | 3A 0A - - | 64.73/16.45 \ - - - 0A / 64.73/16.45 1 Wk / - - - 1A \ 64.73/16.45 | 0A - 3A 3A | 64.73/16.45 | 3A - 0A 4A | 64.73/16.45 \ - - - 0A / 64.73/16.45 2 Wk / 3A - 0A 4A \ 64.73/16.45 | 3A - 4A 1A | 64.73/16.45 | 0A - - - | 64.73/16.45 \ - - - 0A / 64.73/16.45 3 Wk / 3A - 3A 4A \ 64.73/16.45 | - - 1A - | 64.73/16.45 | - - - - | 64.73/16.45 \ - - - 0A / 64.73/16.45 5 Wk / 3A - 1A 0A \ 64.73/16.45 | 2A - 0A - | 64.73/16.45 | - - - - | 64.73/16.45 \ - - - 0A / 64.73/16.45 [3, 1] |-> [3, 2] 64.73/16.45 lhs rhs ge gt 64.73/16.45 Wk / 6A - 3A 7A \ Wk / 6A - 3A 7A \ True False 64.73/16.45 | 4A - 1A 5A | | 1A - - - | 64.73/16.45 | - - - - | | - - - - | 64.73/16.45 \ - - - 0A / \ - - - 0A / 64.73/16.45 [3, 1] |-> [5] 64.73/16.46 lhs rhs ge gt 64.73/16.46 Wk / 6A - 3A 7A \ Wk / 3A - 1A 0A \ True True 64.73/16.46 | 4A - 1A 5A | | 2A - 0A - | 64.73/16.46 | - - - - | | - - - - | 64.73/16.46 \ - - - 0A / \ - - - 0A / 64.73/16.46 [5, 2] |-> [3] 64.73/16.46 lhs rhs ge gt 64.73/16.46 Wk / 6A - 3A 7A \ Wk / 3A - 3A 4A \ True False 64.73/16.46 | 5A - 2A 6A | | - - 1A - | 64.73/16.46 | - - - - | | - - - - | 64.73/16.46 \ - - - 0A / \ - - - 0A / 64.73/16.46 [5, 2] |-> [3, 1] 64.73/16.46 lhs rhs ge gt 64.73/16.46 Wk / 6A - 3A 7A \ Wk / 6A - 3A 7A \ True False 64.73/16.46 | 5A - 2A 6A | | 4A - 1A 5A | 64.73/16.46 | - - - - | | - - - - | 64.73/16.46 \ - - - 0A / \ - - - 0A / 64.73/16.46 [5, 2] |-> [3, 1, 1] 64.73/16.46 lhs rhs ge gt 64.73/16.46 Wk / 6A - 3A 7A \ Wk / 6A - 3A 7A \ True False 64.73/16.46 | 5A - 2A 6A | | 4A - 1A 5A | 64.73/16.46 | - - - - | | - - - - | 64.73/16.46 \ - - - 0A / \ - - - 0A / 64.73/16.46 [0, 0] ->= [] 64.73/16.46 lhs rhs ge gt 64.73/16.46 Wk / 0A - - 0A \ Wk / 0A - - - \ True False 64.73/16.46 | 3A 0A - - | | - 0A - - | 64.73/16.46 | 3A - 0A 3A | | - - 0A - | 64.73/16.46 \ - - - 0A / \ - - - 0A / 64.73/16.46 [1, 1] ->= [0, 1, 2] 64.73/16.46 lhs rhs ge gt 64.73/16.46 Wk / - - - 1A \ Wk / - - - 1A \ True False 64.73/16.46 | 6A - 3A 7A | | 6A - 3A 7A | 64.73/16.46 | 3A - 0A 4A | | 3A - 0A 4A | 64.73/16.46 \ - - - 0A / \ - - - 0A / 64.73/16.46 [2, 2] ->= [1, 1, 1] 64.73/16.46 lhs rhs ge gt 64.73/16.46 Wk / 6A - 3A 7A \ Wk / - - - 1A \ True False 64.73/16.46 | 6A - 3A 7A | | 6A - 3A 7A |
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