details

property	value
status	complete
benchmark	size-12-alpha-3-num-178.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n006.star.cs.uiowa.edu
space	Waldmann_07_size12

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	4.9382 seconds
cpu usage	15.6049
user time	14.8806
system time	0.724324
max virtual memory	2.0407056E7
max residence set size	2027568.0

stage attributes

key	value
starexec-result	NO

output

14.59/4.62 NO 15.22/4.80 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 15.22/4.80 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 15.22/4.80 15.22/4.80 15.22/4.80 Termination w.r.t. Q of the given QTRS could be disproven: 15.22/4.80 15.22/4.80 (0) QTRS 15.22/4.80 (1) NonTerminationProof [COMPLETE, 598 ms] 15.22/4.80 (2) NO 15.22/4.80 15.22/4.80 15.22/4.80 ---------------------------------------- 15.22/4.80 15.22/4.80 (0) 15.22/4.80 Obligation: 15.22/4.80 Q restricted rewrite system: 15.22/4.80 The TRS R consists of the following rules: 15.22/4.80 15.22/4.80 a(x1) -> x1 15.22/4.80 a(b(x1)) -> b(a(c(b(a(a(x1)))))) 15.22/4.80 b(x1) -> x1 15.22/4.80 c(c(x1)) -> x1 15.22/4.80 15.22/4.80 Q is empty. 15.22/4.80 15.22/4.80 ---------------------------------------- 15.22/4.80 15.22/4.80 (1) NonTerminationProof (COMPLETE) 15.22/4.80 We used the non-termination processor [OPPELT08] to show that the SRS problem is infinite. 15.22/4.80 15.22/4.80 Found the self-embedding DerivationStructure: 15.22/4.80 "a b b c b -> c a b b c b" 15.22/4.80 a b b c b -> c a b b c b 15.22/4.80 by OverlapClosure OC 3"a b b c b -> c a b b a c b 15.22/4.80 by OverlapClosure OC 2"a b b c -> c a b a 15.22/4.80 by OverlapClosure OC 3"a b b c -> c b a b a 15.22/4.80 by OverlapClosure OC 2"a b b -> c b a b a c 15.22/4.80 by OverlapClosure OC 2"a b b -> c b a b a c b 15.22/4.80 by OverlapClosure OC 2"a b -> c b a a 15.22/4.80 by OverlapClosure OC 3"a b -> b c b a a 15.22/4.80 by OverlapClosure OC 3"a b -> b a c b a a 15.22/4.80 by original rule (OC 1)""a -> 15.22/4.80 by original rule (OC 1)"""b -> 15.22/4.80 by original rule (OC 1)"""a b -> b a c b 15.22/4.80 by OverlapClosure OC 2"a b -> b a c b a 15.22/4.80 by OverlapClosure OC 2"a b -> b a c b a a 15.22/4.80 by original rule (OC 1)""a -> 15.22/4.80 by original rule (OC 1)"""a -> 15.22/4.80 by original rule (OC 1)""""b -> 15.22/4.80 by original rule (OC 1)"""c c -> 15.22/4.80 by original rule (OC 1)"""b -> 15.22/4.80 by original rule (OC 1)"""a b -> b a c b 15.22/4.80 by OverlapClosure OC 2"a b -> b a c b a 15.22/4.80 by OverlapClosure OC 2"a b -> b a c b a a 15.22/4.80 by original rule (OC 1)""a -> 15.22/4.80 by original rule (OC 1)"""a -> 15.22/4.80 by original rule (OC 1)""""a -> 15.22/4.80 by original rule (OC 1)" 15.22/4.80 15.22/4.80 ---------------------------------------- 15.22/4.80 15.22/4.80 (2) 15.22/4.80 NO 15.59/4.93 EOF popout

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all output return to SRS_Standard 2019-03-29 03.29