details

property	value
status	complete
benchmark	size-12-alpha-3-num-273.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n141.star.cs.uiowa.edu
space	Waldmann_07_size12

run statistics

property	value
solver	ttt2-1.19
configuration	ttt2
runtime (wallclock)	11.9155 seconds
cpu usage	43.329
user time	42.1453
system time	1.18375
max virtual memory	3469564.0
max residence set size	85832.0

stage attributes

key	value
starexec-result	YES

output

42.30/11.03 YES 42.30/11.04 42.30/11.04 Problem: 42.30/11.04 a(x1) -> x1 42.30/11.04 a(b(x1)) -> c(a(a(c(x1)))) 42.30/11.04 b(x1) -> x1 42.30/11.04 c(c(x1)) -> b(b(x1)) 42.30/11.04 42.30/11.04 Proof: 42.30/11.04 DP Processor: 42.30/11.04 DPs: 42.30/11.04 a#(b(x1)) -> c#(x1) 42.30/11.04 a#(b(x1)) -> a#(c(x1)) 42.30/11.04 a#(b(x1)) -> a#(a(c(x1))) 42.30/11.04 a#(b(x1)) -> c#(a(a(c(x1)))) 42.30/11.04 c#(c(x1)) -> b#(x1) 42.30/11.04 c#(c(x1)) -> b#(b(x1)) 42.30/11.04 TRS: 42.30/11.04 a(x1) -> x1 42.30/11.04 a(b(x1)) -> c(a(a(c(x1)))) 42.30/11.04 b(x1) -> x1 42.30/11.04 c(c(x1)) -> b(b(x1)) 42.30/11.04 TDG Processor: 42.30/11.04 DPs: 42.30/11.04 a#(b(x1)) -> c#(x1) 42.30/11.04 a#(b(x1)) -> a#(c(x1)) 42.30/11.04 a#(b(x1)) -> a#(a(c(x1))) 42.30/11.04 a#(b(x1)) -> c#(a(a(c(x1)))) 42.30/11.04 c#(c(x1)) -> b#(x1) 42.30/11.04 c#(c(x1)) -> b#(b(x1)) 42.30/11.04 TRS: 42.30/11.04 a(x1) -> x1 42.30/11.04 a(b(x1)) -> c(a(a(c(x1)))) 42.30/11.04 b(x1) -> x1 42.30/11.04 c(c(x1)) -> b(b(x1)) 42.30/11.04 graph: 42.30/11.04 a#(b(x1)) -> c#(a(a(c(x1)))) -> c#(c(x1)) -> b#(b(x1)) 42.30/11.04 a#(b(x1)) -> c#(a(a(c(x1)))) -> c#(c(x1)) -> b#(x1) 42.30/11.04 a#(b(x1)) -> c#(x1) -> c#(c(x1)) -> b#(b(x1)) 42.30/11.04 a#(b(x1)) -> c#(x1) -> c#(c(x1)) -> b#(x1) 42.30/11.04 a#(b(x1)) -> a#(c(x1)) -> a#(b(x1)) -> c#(a(a(c(x1)))) 42.30/11.04 a#(b(x1)) -> a#(c(x1)) -> a#(b(x1)) -> a#(a(c(x1))) 42.30/11.04 a#(b(x1)) -> a#(c(x1)) -> a#(b(x1)) -> a#(c(x1)) 42.30/11.04 a#(b(x1)) -> a#(c(x1)) -> a#(b(x1)) -> c#(x1) 42.30/11.04 a#(b(x1)) -> a#(a(c(x1))) -> a#(b(x1)) -> c#(a(a(c(x1)))) 42.30/11.04 a#(b(x1)) -> a#(a(c(x1))) -> a#(b(x1)) -> a#(a(c(x1))) 42.30/11.04 a#(b(x1)) -> a#(a(c(x1))) -> a#(b(x1)) -> a#(c(x1)) 42.30/11.04 a#(b(x1)) -> a#(a(c(x1))) -> a#(b(x1)) -> c#(x1) 42.30/11.04 SCC Processor: 42.30/11.04 #sccs: 1 42.30/11.04 #rules: 2 42.30/11.04 #arcs: 12/36 42.30/11.04 DPs: 42.30/11.04 a#(b(x1)) -> a#(c(x1)) 42.30/11.04 a#(b(x1)) -> a#(a(c(x1))) 42.30/11.04 TRS: 42.30/11.04 a(x1) -> x1 42.30/11.04 a(b(x1)) -> c(a(a(c(x1)))) 42.30/11.04 b(x1) -> x1 42.30/11.04 c(c(x1)) -> b(b(x1)) 42.30/11.04 Root-Labeling Processor: 42.30/11.04 DPs: 42.30/11.04 a{#,(f6)}(f6(b)(b(f6)(x1))) -> a{#,(f6)}(f6(c)(c(f6)(x1))) 42.30/11.04 a{#,(f6)}(f6(b)(b(a)(x1))) -> a{#,(f6)}(f6(c)(c(a)(x1))) 42.30/11.04 a{#,(f6)}(f6(b)(b(b)(x1))) -> a{#,(f6)}(f6(c)(c(b)(x1))) 42.30/11.04 a{#,(f6)}(f6(b)(b(c)(x1))) -> a{#,(f6)}(f6(c)(c(c)(x1))) 42.30/11.04 a{#,(f6)}(f6(b)(b(f6)(x1))) -> a{#,(f6)}(f6(a)(a(c)(c(f6)(x1)))) 42.30/11.04 a{#,(f6)}(f6(b)(b(a)(x1))) -> a{#,(f6)}(f6(a)(a(c)(c(a)(x1)))) 42.30/11.04 a{#,(f6)}(f6(b)(b(b)(x1))) -> a{#,(f6)}(f6(a)(a(c)(c(b)(x1)))) 42.30/11.04 a{#,(f6)}(f6(b)(b(c)(x1))) -> a{#,(f6)}(f6(a)(a(c)(c(c)(x1)))) 42.30/11.04 TRS: 42.30/11.04 f6(a)(a(f6)(x1)) -> f6(f6)(x1) 42.30/11.04 f6(a)(a(a)(x1)) -> f6(a)(x1) 42.30/11.04 f6(a)(a(b)(x1)) -> f6(b)(x1) 42.30/11.04 f6(a)(a(c)(x1)) -> f6(c)(x1) 42.30/11.04 a(a)(a(f6)(x1)) -> a(f6)(x1) 42.30/11.04 a(a)(a(a)(x1)) -> a(a)(x1) 42.30/11.04 a(a)(a(b)(x1)) -> a(b)(x1) 42.30/11.04 a(a)(a(c)(x1)) -> a(c)(x1) 42.30/11.04 b(a)(a(f6)(x1)) -> b(f6)(x1) 42.30/11.04 b(a)(a(a)(x1)) -> b(a)(x1) 42.30/11.04 b(a)(a(b)(x1)) -> b(b)(x1) 42.30/11.04 b(a)(a(c)(x1)) -> b(c)(x1) 42.30/11.04 c(a)(a(f6)(x1)) -> c(f6)(x1) 42.30/11.04 c(a)(a(a)(x1)) -> c(a)(x1) 42.30/11.04 c(a)(a(b)(x1)) -> c(b)(x1) 42.30/11.04 c(a)(a(c)(x1)) -> c(c)(x1) 42.30/11.04 f6(a)(a(b)(b(f6)(x1))) -> f6(c)(c(a)(a(a)(a(c)(c(f6)(x1))))) 42.30/11.04 f6(a)(a(b)(b(a)(x1))) -> f6(c)(c(a)(a(a)(a(c)(c(a)(x1))))) 42.30/11.04 f6(a)(a(b)(b(b)(x1))) -> f6(c)(c(a)(a(a)(a(c)(c(b)(x1))))) 42.30/11.04 f6(a)(a(b)(b(c)(x1))) -> f6(c)(c(a)(a(a)(a(c)(c(c)(x1))))) 42.30/11.04 a(a)(a(b)(b(f6)(x1))) -> a(c)(c(a)(a(a)(a(c)(c(f6)(x1))))) 42.30/11.04 a(a)(a(b)(b(a)(x1))) -> a(c)(c(a)(a(a)(a(c)(c(a)(x1))))) 42.30/11.04 a(a)(a(b)(b(b)(x1))) -> a(c)(c(a)(a(a)(a(c)(c(b)(x1))))) 42.30/11.04 a(a)(a(b)(b(c)(x1))) -> a(c)(c(a)(a(a)(a(c)(c(c)(x1))))) 42.30/11.04 b(a)(a(b)(b(f6)(x1))) -> b(c)(c(a)(a(a)(a(c)(c(f6)(x1))))) 42.30/11.04 b(a)(a(b)(b(a)(x1))) -> b(c)(c(a)(a(a)(a(c)(c(a)(x1))))) 42.30/11.04 b(a)(a(b)(b(b)(x1))) -> b(c)(c(a)(a(a)(a(c)(c(b)(x1))))) 42.30/11.04 b(a)(a(b)(b(c)(x1))) -> b(c)(c(a)(a(a)(a(c)(c(c)(x1))))) 42.30/11.04 c(a)(a(b)(b(f6)(x1))) -> c(c)(c(a)(a(a)(a(c)(c(f6)(x1))))) popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS_Standard 2019-03-29 03.29