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SRS_Standard 2019-03-29 03.29 pair #432291110
details
property
value
status
complete
benchmark
size-12-alpha-3-num-274.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n095.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
5.25913 seconds
cpu usage
20.6279
user time
18.0359
system time
2.592
max virtual memory
1.1668442E8
max residence set size
443776.0
stage attributes
key
value
starexec-result
NO
output
7.76/2.01 NO 7.76/2.01 property Termination 7.76/2.01 has value False 7.76/2.01 for SRS ( [a] -> [], [a, b] -> [c, a, c], [c, c] -> [b, b, b, a]) 7.76/2.01 reason 7.76/2.01 remap for 3 rules 7.76/2.01 property Termination 7.76/2.02 has value False 7.76/2.02 for SRS ( [0] -> [], [0, 1] -> [2, 0, 2], [2, 2] -> [1, 1, 1, 0]) 7.76/2.02 reason 7.76/2.02 looping SRS derivation 7.76/2.02 Closure source : abcbc 7.76/2.02 target : cbbbbbbcbbbbbbbbbbbbbbbcbbbbbbabcbcacba 7.76/2.02 steps : 45 7.76/2.02 strict : True 7.76/2.02 last_rule_app_source : 0 7.76/2.02 last_rule_app_target : 34 7.76/2.02 reason : Overlap (Inside 34) 7.76/2.02 Overlap (Inside 32) 7.76/2.02 Overlap (Inside 32) 7.76/2.03 Overlap (Inside 27) 7.76/2.03 Overlap (Inside 28) 7.76/2.03 Overlap (Inside 27) 7.76/2.03 Overlap (Inside 24) 7.76/2.03 Overlap (Inside 25) 7.76/2.03 Overlap (Inside 24) 7.76/2.03 Overlap (Inside 25) 7.76/2.03 Overlap (Inside 23) 7.76/2.03 Overlap (Inside 25) 7.76/2.03 Overlap (Inside 20) 7.76/2.03 Overlap (Inside 21) 7.76/2.03 Overlap (Inside 20) 7.76/2.03 Overlap (Inside 17) 7.76/2.03 Overlap (Inside 18) 7.76/2.03 Overlap (Inside 17) 7.76/2.03 Overlap (Inside 14) 7.76/2.03 Overlap (Inside 16) 7.76/2.03 Overlap (Inside 17) 7.76/2.03 Overlap (Inside 15) 7.76/2.03 Overlap (Inside 14) 7.76/2.03 Overlap (Inside 16) 7.76/2.03 Overlap (Inside 17) 7.76/2.03 Overlap (Inside 18) 7.76/2.03 Overlap (Inside 17) 7.76/2.03 Overlap (Right 1) 7.76/2.03 Overlap (Inside 11) 7.76/2.03 Overlap (Inside 12) 7.76/2.03 Overlap (Inside 11) 7.76/2.03 Overlap (Inside 8) 7.76/2.03 Overlap (Inside 9) 7.76/2.03 Overlap (Inside 8) 7.76/2.03 Overlap (Inside 9) 7.76/2.03 Overlap (Right 1) 7.76/2.03 Overlap (Inside 7) 7.76/2.03 Overlap (Inside 4) 7.76/2.03 Overlap (Inside 5) 7.76/2.03 Overlap (Inside 4) 7.76/2.03 Overlap (Inside 1) 7.76/2.03 Overlap (Inside 2) 7.76/2.03 Overlap (Inside 1) 7.76/2.03 Overlap (Right 1) 7.76/2.03 Rule 1 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 0 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 0 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 1 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 0 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 0 7.76/2.03 Rule 2 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 0 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 1 7.76/2.03 Rule 0 7.76/2.03 Rule 0 7.76/2.03 Rule 2 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 0 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 0 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 1 7.76/2.03 Rule 2 7.76/2.03 Rule 1 7.76/2.03 Rule 0 7.76/2.03 Rule 2
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