details

property	value
status	complete
benchmark	z113.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n005.star.cs.uiowa.edu
space	Zantema_04

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	6.83255 seconds
cpu usage	20.6489
user time	19.5083
system time	1.14065
max virtual memory	2.0212992E7
max residence set size	3516396.0

stage attributes

key	value
starexec-result	YES

output

20.31/6.29 YES 20.31/6.30 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 20.31/6.30 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 20.31/6.30 20.31/6.30 20.31/6.30 Termination w.r.t. Q of the given QTRS could be proven: 20.31/6.30 20.31/6.30 (0) QTRS 20.31/6.30 (1) QTRS Reverse [EQUIVALENT, 0 ms] 20.31/6.30 (2) QTRS 20.31/6.30 (3) QTRSRRRProof [EQUIVALENT, 22 ms] 20.31/6.30 (4) QTRS 20.31/6.30 (5) DependencyPairsProof [EQUIVALENT, 27 ms] 20.31/6.30 (6) QDP 20.31/6.30 (7) DependencyGraphProof [EQUIVALENT, 2 ms] 20.31/6.30 (8) AND 20.31/6.30 (9) QDP 20.31/6.30 (10) UsableRulesProof [EQUIVALENT, 0 ms] 20.31/6.30 (11) QDP 20.31/6.30 (12) MRRProof [EQUIVALENT, 11 ms] 20.31/6.30 (13) QDP 20.31/6.30 (14) PisEmptyProof [EQUIVALENT, 0 ms] 20.31/6.30 (15) YES 20.31/6.30 (16) QDP 20.31/6.30 (17) UsableRulesProof [EQUIVALENT, 1 ms] 20.31/6.30 (18) QDP 20.31/6.30 (19) QDPSizeChangeProof [EQUIVALENT, 0 ms] 20.31/6.30 (20) YES 20.31/6.30 20.31/6.30 20.31/6.30 ---------------------------------------- 20.31/6.30 20.31/6.30 (0) 20.31/6.30 Obligation: 20.31/6.30 Q restricted rewrite system: 20.31/6.30 The TRS R consists of the following rules: 20.31/6.30 20.31/6.30 1(1(x1)) -> 4(3(x1)) 20.31/6.30 1(2(x1)) -> 2(1(x1)) 20.31/6.30 2(2(x1)) -> 1(1(1(x1))) 20.31/6.30 3(3(x1)) -> 5(6(x1)) 20.31/6.30 3(4(x1)) -> 1(1(x1)) 20.31/6.30 4(4(x1)) -> 3(x1) 20.31/6.30 5(5(x1)) -> 6(2(x1)) 20.31/6.30 5(6(x1)) -> 1(2(x1)) 20.31/6.30 6(6(x1)) -> 2(1(x1)) 20.31/6.30 20.31/6.30 Q is empty. 20.31/6.30 20.31/6.30 ---------------------------------------- 20.31/6.30 20.31/6.30 (1) QTRS Reverse (EQUIVALENT) 20.31/6.30 We applied the QTRS Reverse Processor [REVERSE]. 20.31/6.30 ---------------------------------------- 20.31/6.30 20.31/6.30 (2) 20.31/6.30 Obligation: 20.31/6.30 Q restricted rewrite system: 20.31/6.30 The TRS R consists of the following rules: 20.31/6.30 20.31/6.30 1(1(x1)) -> 3(4(x1)) 20.31/6.30 2(1(x1)) -> 1(2(x1)) 20.31/6.30 2(2(x1)) -> 1(1(1(x1))) 20.31/6.30 3(3(x1)) -> 6(5(x1)) 20.31/6.30 4(3(x1)) -> 1(1(x1)) 20.31/6.30 4(4(x1)) -> 3(x1) 20.31/6.30 5(5(x1)) -> 2(6(x1)) 20.31/6.30 6(5(x1)) -> 2(1(x1)) 20.31/6.30 6(6(x1)) -> 1(2(x1)) 20.31/6.30 20.31/6.30 Q is empty. 20.31/6.30 20.31/6.30 ---------------------------------------- 20.31/6.30 20.31/6.30 (3) QTRSRRRProof (EQUIVALENT) 20.31/6.30 Used ordering: 20.31/6.30 Polynomial interpretation [POLO]: 20.31/6.30 20.31/6.30 POL(1(x_1)) = 85 + x_1 20.31/6.30 POL(2(x_1)) = 128 + x_1 20.31/6.30 POL(3(x_1)) = 113 + x_1 20.31/6.30 POL(4(x_1)) = 57 + x_1 20.31/6.30 POL(5(x_1)) = 118 + x_1 20.31/6.30 POL(6(x_1)) = 107 + x_1 20.31/6.30 With this ordering the following rules can be removed by the rule removal processor [LPAR04] because they are oriented strictly: 20.31/6.30 20.31/6.30 2(2(x1)) -> 1(1(1(x1))) 20.31/6.30 3(3(x1)) -> 6(5(x1)) 20.31/6.30 4(4(x1)) -> 3(x1) 20.31/6.30 5(5(x1)) -> 2(6(x1)) 20.31/6.30 6(5(x1)) -> 2(1(x1)) 20.31/6.30 6(6(x1)) -> 1(2(x1)) 20.31/6.30 20.31/6.30 20.31/6.30 20.31/6.30 20.31/6.30 ---------------------------------------- 20.31/6.30 20.31/6.30 (4) 20.31/6.30 Obligation: popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to SRS_Standard 2019-03-29 03.29