details

property	value
status	complete
benchmark	z085.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n117.star.cs.uiowa.edu
space	Zantema_04

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	1.99975 seconds
cpu usage	4.30002
user time	4.12584
system time	0.174178
max virtual memory	1.9141548E7
max residence set size	382408.0

stage attributes

key	value
starexec-result	YES

output

3.96/1.95 YES 3.96/1.96 proof of /export/starexec/sandbox2/benchmark/theBenchmark.xml 3.96/1.96 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 3.96/1.96 3.96/1.96 3.96/1.96 Termination w.r.t. Q of the given QTRS could be proven: 3.96/1.96 3.96/1.96 (0) QTRS 3.96/1.96 (1) QTRS Reverse [EQUIVALENT, 0 ms] 3.96/1.96 (2) QTRS 3.96/1.96 (3) QTRSRRRProof [EQUIVALENT, 19 ms] 3.96/1.96 (4) QTRS 3.96/1.96 (5) RisEmptyProof [EQUIVALENT, 0 ms] 3.96/1.96 (6) YES 3.96/1.96 3.96/1.96 3.96/1.96 ---------------------------------------- 3.96/1.96 3.96/1.96 (0) 3.96/1.96 Obligation: 3.96/1.96 Q restricted rewrite system: 3.96/1.96 The TRS R consists of the following rules: 3.96/1.96 3.96/1.96 a(x1) -> b(b(x1)) 3.96/1.96 b(b(b(x1))) -> a(x1) 3.96/1.96 3.96/1.96 Q is empty. 3.96/1.96 3.96/1.96 ---------------------------------------- 3.96/1.96 3.96/1.96 (1) QTRS Reverse (EQUIVALENT) 3.96/1.96 We applied the QTRS Reverse Processor [REVERSE]. 3.96/1.96 ---------------------------------------- 3.96/1.96 3.96/1.96 (2) 3.96/1.96 Obligation: 3.96/1.96 Q restricted rewrite system: 3.96/1.96 The TRS R consists of the following rules: 3.96/1.96 3.96/1.96 a(x1) -> b(b(x1)) 3.96/1.96 b(b(b(x1))) -> a(x1) 3.96/1.96 3.96/1.96 Q is empty. 3.96/1.96 3.96/1.96 ---------------------------------------- 3.96/1.96 3.96/1.96 (3) QTRSRRRProof (EQUIVALENT) 3.96/1.96 Used ordering: 3.96/1.96 Polynomial interpretation [POLO]: 3.96/1.96 3.96/1.96 POL(a(x_1)) = 5 + x_1 3.96/1.96 POL(b(x_1)) = 2 + x_1 3.96/1.96 With this ordering the following rules can be removed by the rule removal processor [LPAR04] because they are oriented strictly: 3.96/1.96 3.96/1.96 a(x1) -> b(b(x1)) 3.96/1.96 b(b(b(x1))) -> a(x1) 3.96/1.96 3.96/1.96 3.96/1.96 3.96/1.96 3.96/1.96 ---------------------------------------- 3.96/1.96 3.96/1.96 (4) 3.96/1.96 Obligation: 3.96/1.96 Q restricted rewrite system: 3.96/1.96 R is empty. 3.96/1.96 Q is empty. 3.96/1.96 3.96/1.96 ---------------------------------------- 3.96/1.96 3.96/1.96 (5) RisEmptyProof (EQUIVALENT) 3.96/1.96 The TRS R is empty. Hence, termination is trivially proven. 3.96/1.96 ---------------------------------------- 3.96/1.96 3.96/1.96 (6) 3.96/1.96 YES 4.27/1.99 EOF popout

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all output return to SRS_Standard 2019-03-29 03.29