Spaces
Explore
Communities
Statistics
Reports
Cluster
Status
Help
SRS_Standard 2019-03-29 03.29 pair #432292490
details
property
value
status
complete
benchmark
abbaaaaaaa-aaaaaaaaabbabb.srs.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n100.star.cs.uiowa.edu
space
Wenzel_16
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
6.43333 seconds
cpu usage
24.8782
user time
19.3713
system time
5.50694
max virtual memory
1.16476976E8
max residence set size
1425148.0
stage attributes
key
value
starexec-result
NO
output
24.33/6.16 NO 24.33/6.16 property Termination 24.33/6.16 has value False 24.33/6.16 for SRS ( [a, b, b, a, a, a, a, a, a, a] -> [a, a, a, a, a, a, a, a, a, b, b, a, b, b]) 24.33/6.16 reason 24.33/6.16 remap for 1 rules 24.33/6.16 property Termination 24.33/6.16 has value False 24.33/6.16 for SRS ( [0, 1, 1, 0, 0, 0, 0, 0, 0, 0] -> [0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1]) 24.33/6.16 reason 24.33/6.16 looping SRS derivation 24.33/6.16 Closure source : abbaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa 24.33/6.16 target : aaaaaaaaabbaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaabbabbaabbabbaaabbabbaabbabbaaaabbabbaabbabbaaabbabbaabbabbaaaaabbabbaabbabbaaabbabbaabbabbaaaabbabbaabbabbaaabbabbaabbabbaaaaaabbabbaabbabbaaabbabbaabbabbaaaabbabbaabbabbaaabbabbaabbabbaaaaabbabbaabbabbaaabbabbaabbabbaaaabbabbaabbabbaaabbabbaabbabb 24.33/6.16 steps : 64 24.33/6.16 strict : True 24.33/6.16 last_rule_app_source : 0 24.33/6.16 last_rule_app_target : 51 24.33/6.16 reason : Overlap (Inside 51) 24.33/6.16 Overlap (Inside 54) 24.33/6.16 Overlap (Inside 58) 24.33/6.16 Overlap (Inside 61) 24.33/6.16 Overlap (Inside 66) 24.33/6.16 Overlap (Inside 69) 24.33/6.16 Overlap (Inside 73) 24.33/6.16 Overlap (Inside 76) 24.33/6.16 Overlap (Inside 82) 24.33/6.16 Overlap (Inside 85) 24.33/6.16 Overlap (Inside 89) 24.33/6.16 Overlap (Inside 92) 24.33/6.16 Overlap (Inside 97) 24.33/6.16 Overlap (Inside 100) 24.33/6.16 Overlap (Inside 104) 24.33/6.16 Overlap (Inside 107) 24.33/6.16 Overlap (Inside 114) 24.33/6.16 Overlap (Inside 117) 24.33/6.16 Overlap (Inside 121) 24.33/6.16 Overlap (Inside 124) 24.33/6.16 Overlap (Inside 129) 24.33/6.16 Overlap (Inside 132) 24.33/6.16 Overlap (Inside 136) 24.33/6.16 Overlap (Inside 139) 24.33/6.16 Overlap (Inside 145) 24.33/6.16 Overlap (Inside 148) 24.33/6.16 Overlap (Inside 152) 24.33/6.16 Overlap (Inside 155) 24.33/6.16 Overlap (Inside 160) 24.33/6.16 Overlap (Inside 163) 24.33/6.16 Overlap (Inside 167) 24.33/6.16 Overlap (Right 3) 24.33/6.16 Overlap (Inside 43) 24.33/6.16 Overlap (Inside 46) 24.33/6.16 Overlap (Inside 50) 24.33/6.16 Overlap (Inside 53) 24.33/6.16 Overlap (Inside 58) 24.33/6.16 Overlap (Inside 61) 24.33/6.16 Overlap (Inside 65) 24.33/6.16 Overlap (Inside 68) 24.33/6.16 Overlap (Inside 74) 24.33/6.16 Overlap (Inside 77) 24.33/6.16 Overlap (Inside 81) 24.33/6.16 Overlap (Inside 84) 24.33/6.16 Overlap (Inside 89) 24.33/6.16 Overlap (Inside 92) 24.33/6.16 Overlap (Inside 96) 24.33/6.17 Overlap (Right 3) 24.33/6.17 Overlap (Inside 35) 24.33/6.17 Overlap (Inside 38) 24.33/6.17 Overlap (Inside 42) 24.33/6.17 Overlap (Inside 45) 24.33/6.17 Overlap (Inside 50) 24.33/6.17 Overlap (Inside 53) 24.33/6.17 Overlap (Inside 57) 24.33/6.17 Overlap (Right 3) 24.33/6.17 Overlap (Inside 27) 24.33/6.17 Overlap (Inside 30) 24.33/6.17 Overlap (Inside 34) 24.33/6.17 Overlap (Right 3) 24.33/6.17 Overlap (Inside 19) 24.33/6.17 Overlap (Right 3) 24.33/6.17 Overlap (Right 3) 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0 24.33/6.17 Rule 0
popout
output may be truncated. 'popout' for the full output.
job log
popout
actions
all output
return to SRS_Standard 2019-03-29 03.29