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SRS_Standard 2019-03-29 03.29 pair #432293378
details
property
value
status
complete
benchmark
aabacaaa-aaaaabacaabac.srs.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n134.star.cs.uiowa.edu
space
Wenzel_16
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
55.0008 seconds
cpu usage
217.325
user time
196.364
system time
20.9608
max virtual memory
1.16897148E8
max residence set size
2687844.0
stage attributes
key
value
starexec-result
YES
output
216.66/54.70 YES 216.66/54.71 property Termination 216.66/54.71 has value True 216.66/54.71 for SRS ( [a, a, b, a, c, a, a, a] -> [a, a, a, a, a, b, a, c, a, a, b, a, c]) 216.66/54.71 reason 216.66/54.71 remap for 1 rules 216.66/54.71 property Termination 216.66/54.71 has value True 216.66/54.71 for SRS ( [0, 0, 1, 0, 2, 0, 0, 0] -> [0, 0, 0, 0, 0, 1, 0, 2, 0, 0, 1, 0, 2]) 216.66/54.71 reason 216.66/54.71 reverse each lhs and rhs 216.66/54.71 property Termination 216.66/54.71 has value True 216.66/54.71 for SRS ( [0, 0, 0, 2, 0, 1, 0, 0] -> [2, 0, 1, 0, 0, 2, 0, 1, 0, 0, 0, 0, 0]) 216.66/54.71 reason 216.66/54.71 DP transform 216.66/54.71 property Termination 216.66/54.71 has value True 216.66/54.71 for SRS ( [0, 0, 0, 2, 0, 1, 0, 0] ->= [2, 0, 1, 0, 0, 2, 0, 1, 0, 0, 0, 0, 0], [0#, 0, 0, 2, 0, 1, 0, 0] |-> [0#, 1, 0, 0, 2, 0, 1, 0, 0, 0, 0, 0], [0#, 0, 0, 2, 0, 1, 0, 0] |-> [0#, 0, 2, 0, 1, 0, 0, 0, 0, 0], [0#, 0, 0, 2, 0, 1, 0, 0] |-> [0#, 2, 0, 1, 0, 0, 0, 0, 0], [0#, 0, 0, 2, 0, 1, 0, 0] |-> [0#, 1, 0, 0, 0, 0, 0], [0#, 0, 0, 2, 0, 1, 0, 0] |-> [0#, 0, 0, 0, 0], [0#, 0, 0, 2, 0, 1, 0, 0] |-> [0#, 0, 0, 0], [0#, 0, 0, 2, 0, 1, 0, 0] |-> [0#, 0, 0]) 216.66/54.71 reason 216.66/54.71 remap for 8 rules 216.66/54.71 property Termination 216.66/54.71 has value True 216.66/54.71 for SRS ( [0, 0, 0, 1, 0, 2, 0, 0] ->= [1, 0, 2, 0, 0, 1, 0, 2, 0, 0, 0, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 2, 0, 0, 1, 0, 2, 0, 0, 0, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 1, 0, 2, 0, 0, 0, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 1, 0, 2, 0, 0, 0, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 2, 0, 0, 0, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0]) 216.66/54.71 reason 216.66/54.71 EDG has 1 SCCs 216.66/54.71 property Termination 216.66/54.71 has value True 216.66/54.71 for SRS ( [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0, 0, 0], [0, 0, 0, 1, 0, 2, 0, 0] ->= [1, 0, 2, 0, 0, 1, 0, 2, 0, 0, 0, 0, 0]) 216.66/54.71 reason 216.66/54.71 Matrix { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False} 216.66/54.71 interpretation 216.66/54.71 0 Wk / - 0A 1A 0A \ 216.66/54.71 | 0A - - 1A | 216.66/54.71 | - 2A - - | 216.66/54.71 \ - - - 0A / 216.66/54.71 1 Wk / 0A - - 4A \ 216.66/54.71 | 1A 0A 0A - | 216.66/54.71 | - - - 0A | 216.66/54.71 \ - - - 0A / 216.66/54.71 2 Wk / - 0A 1A 4A \ 216.66/54.71 | - - - - | 216.66/54.71 | - - - - | 216.66/54.71 \ - - - 0A / 216.66/54.71 3 Wk / 0A - - 6A \ 216.66/54.71 | - - - - | 216.66/54.71 | - - - - | 216.66/54.71 \ - - - 0A / 216.66/54.71 [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0] 216.66/54.71 lhs rhs ge gt 216.66/54.71 Wk / 6A 3A 4A 7A \ Wk / 0A 3A - 6A \ True False 216.66/54.71 | - - - - | | - - - - | 216.66/54.71 | - - - - | | - - - - | 216.66/54.71 \ - - - 0A / \ - - - 0A / 216.66/54.71 [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0, 0] 216.66/54.71 lhs rhs ge gt 216.66/54.71 Wk / 6A 3A 4A 7A \ Wk / 3A 0A 1A 6A \ True True 216.66/54.71 | - - - - | | - - - - | 216.66/54.71 | - - - - | | - - - - | 216.66/54.71 \ - - - 0A / \ - - - 0A / 216.66/54.71 [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0, 0, 0] 216.66/54.71 lhs rhs ge gt 216.66/54.71 Wk / 6A 3A 4A 7A \ Wk / 0A 3A 4A 6A \ True False 216.66/54.71 | - - - - | | - - - - | 216.66/54.71 | - - - - | | - - - - | 216.66/54.71 \ - - - 0A / \ - - - 0A / 216.66/54.71 [0, 0, 0, 1, 0, 2, 0, 0] ->= [1, 0, 2, 0, 0, 1, 0, 2, 0, 0, 0, 0, 0] 216.66/54.72 lhs rhs ge gt 216.66/54.72 Wk / 3A 0A 1A 7A \ Wk / - - - 4A \ True False 216.66/54.72 | 6A 3A 4A 7A | | 6A 3A 4A 7A | 216.66/54.72 | 5A 2A 3A 6A | | - - - 0A | 216.66/54.72 \ - - - 0A / \ - - - 0A / 216.66/54.72 property Termination 216.66/54.72 has value True 216.66/54.72 for SRS ( [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0, 0, 0], [0, 0, 0, 1, 0, 2, 0, 0] ->= [1, 0, 2, 0, 0, 1, 0, 2, 0, 0, 0, 0, 0]) 216.66/54.72 reason 216.66/54.72 EDG has 1 SCCs 216.66/54.72 property Termination 216.66/54.72 has value True 216.66/54.72 for SRS ( [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0], [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0, 0, 0], [0, 0, 0, 1, 0, 2, 0, 0] ->= [1, 0, 2, 0, 0, 1, 0, 2, 0, 0, 0, 0, 0]) 216.66/54.72 reason 216.66/54.72 Matrix { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False} 216.66/54.72 interpretation 216.66/54.72 0 Wk / - 0A - 0A \ 216.66/54.72 | - - 0A - | 216.66/54.72 | 2A - - 0A | 216.66/54.72 \ - - - 0A / 216.66/54.72 1 Wk / - 0A - 4A \ 216.66/54.72 | - - - 1A | 216.66/54.72 | 0A 0A 1A 5A | 216.66/54.72 \ - - - 0A / 216.66/54.72 2 Wk / - - 0A 2A \ 216.66/54.72 | 0A 1A 3A - | 216.66/54.72 | - - 0A - | 216.66/54.72 \ - - - 0A / 216.66/54.72 3 Wk / 2A - 0A 4A \ 216.66/54.72 | 0A - - 3A | 216.66/54.72 | - - - - | 216.66/54.72 \ - - - 0A / 216.66/54.72 [3, 0, 0, 1, 0, 2, 0, 0] |-> [3, 0, 0]
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