details

property	value
status	complete
benchmark	abaaaaa-aaaaaababaabab.srs.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n012.star.cs.uiowa.edu
space	Wenzel_16

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	1.79879 seconds
cpu usage	4.16812
user time	3.9845
system time	0.18362
max virtual memory	1.9207084E7
max residence set size	393136.0

stage attributes

key	value
starexec-result	YES

output

4.07/1.75 YES 4.07/1.76 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 4.07/1.76 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 4.07/1.76 4.07/1.76 4.07/1.76 Termination w.r.t. Q of the given QTRS could be proven: 4.07/1.76 4.07/1.76 (0) QTRS 4.07/1.76 (1) QTRS Reverse [EQUIVALENT, 0 ms] 4.07/1.76 (2) QTRS 4.07/1.76 (3) Strip Symbols Proof [SOUND, 0 ms] 4.07/1.76 (4) QTRS 4.07/1.76 (5) RFCMatchBoundsTRSProof [EQUIVALENT, 0 ms] 4.07/1.76 (6) YES 4.07/1.76 4.07/1.76 4.07/1.76 ---------------------------------------- 4.07/1.76 4.07/1.76 (0) 4.07/1.76 Obligation: 4.07/1.76 Q restricted rewrite system: 4.07/1.76 The TRS R consists of the following rules: 4.07/1.76 4.07/1.76 a(b(a(a(a(a(a(x1))))))) -> a(a(a(a(a(a(b(a(b(a(a(b(a(b(x1)))))))))))))) 4.07/1.76 4.07/1.76 Q is empty. 4.07/1.76 4.07/1.76 ---------------------------------------- 4.07/1.76 4.07/1.76 (1) QTRS Reverse (EQUIVALENT) 4.07/1.76 We applied the QTRS Reverse Processor [REVERSE]. 4.07/1.76 ---------------------------------------- 4.07/1.76 4.07/1.76 (2) 4.07/1.76 Obligation: 4.07/1.76 Q restricted rewrite system: 4.07/1.76 The TRS R consists of the following rules: 4.07/1.76 4.07/1.76 a(a(a(a(a(b(a(x1))))))) -> b(a(b(a(a(b(a(b(a(a(a(a(a(a(x1)))))))))))))) 4.07/1.76 4.07/1.76 Q is empty. 4.07/1.76 4.07/1.76 ---------------------------------------- 4.07/1.76 4.07/1.76 (3) Strip Symbols Proof (SOUND) 4.07/1.76 We were given the following TRS: 4.07/1.76 4.07/1.76 a(a(a(a(a(b(a(x1))))))) -> b(a(b(a(a(b(a(b(a(a(a(a(a(a(x1)))))))))))))) 4.07/1.76 4.07/1.76 By stripping symbols from the only rule of the system, we obtained the following TRS [ENDRULLIS]: 4.07/1.76 4.07/1.76 a(a(a(a(a(b(x)))))) -> b(a(b(a(a(b(a(b(a(a(a(a(a(x))))))))))))) 4.07/1.76 4.07/1.76 ---------------------------------------- 4.07/1.76 4.07/1.76 (4) 4.07/1.76 Obligation: 4.07/1.76 Q restricted rewrite system: 4.07/1.76 The TRS R consists of the following rules: 4.07/1.76 4.07/1.76 a(a(a(a(a(b(x)))))) -> b(a(b(a(a(b(a(b(a(a(a(a(a(x))))))))))))) 4.07/1.76 4.07/1.76 Q is empty. 4.07/1.76 4.07/1.76 ---------------------------------------- 4.07/1.76 4.07/1.76 (5) RFCMatchBoundsTRSProof (EQUIVALENT) 4.07/1.76 Termination of the TRS R could be shown with a Match Bound [MATCHBOUNDS1,MATCHBOUNDS2] of 1. This implies Q-termination of R. 4.07/1.76 The following rules were used to construct the certificate: 4.07/1.76 4.07/1.76 a(a(a(a(a(b(x)))))) -> b(a(b(a(a(b(a(b(a(a(a(a(a(x))))))))))))) 4.07/1.76 4.07/1.76 The certificate found is represented by the following graph. 4.07/1.76 The certificate consists of the following enumerated nodes: 4.07/1.76 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496, 497, 498, 499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511 4.07/1.76 4.07/1.76 Node 486 is start node and node 487 is final node. 4.07/1.76 4.07/1.76 Those nodes are connected through the following edges: 4.07/1.76 4.07/1.76 * 486 to 488 labelled b_1(0)* 487 to 487 labelled #_1(0)* 488 to 489 labelled a_1(0)* 489 to 490 labelled b_1(0)* 490 to 491 labelled a_1(0)* 491 to 492 labelled a_1(0)* 492 to 493 labelled b_1(0)* 493 to 494 labelled a_1(0)* 494 to 495 labelled b_1(0)* 495 to 496 labelled a_1(0)* 495 to 500 labelled b_1(1)* 496 to 497 labelled a_1(0)* 496 to 500 labelled b_1(1)* 497 to 498 labelled a_1(0)* 497 to 500 labelled b_1(1)* 498 to 499 labelled a_1(0)* 498 to 500 labelled b_1(1)* 499 to 487 labelled a_1(0)* 499 to 500 labelled b_1(1)* 500 to 501 labelled a_1(1)* 501 to 502 labelled b_1(1)* 502 to 503 labelled a_1(1)* 503 to 504 labelled a_1(1)* 504 to 505 labelled b_1(1)* 505 to 506 labelled a_1(1)* 506 to 507 labelled b_1(1)* 507 to 508 labelled a_1(1)* 507 to 500 labelled b_1(1)* 508 to 509 labelled a_1(1)* 508 to 500 labelled b_1(1)* 509 to 510 labelled a_1(1)* 509 to 500 labelled b_1(1)* 510 to 511 labelled a_1(1)* 510 to 500 labelled b_1(1)* 511 to 487 labelled a_1(1)* 511 to 500 labelled b_1(1) 4.07/1.76 4.07/1.76 4.07/1.76 ---------------------------------------- 4.07/1.76 4.07/1.76 (6) 4.07/1.76 YES 4.12/1.79 EOF popout

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