details

property	value
status	complete
benchmark	abaaaa-aaaaabaababab.srs.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n174.star.cs.uiowa.edu
space	Wenzel_16

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	1.80848 seconds
cpu usage	4.01304
user time	3.83136
system time	0.181681
max virtual memory	1.927422E7
max residence set size	341032.0

stage attributes

key	value
starexec-result	YES

output

3.88/1.74 YES 3.93/1.77 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 3.93/1.77 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 3.93/1.77 3.93/1.77 3.93/1.77 Termination w.r.t. Q of the given QTRS could be proven: 3.93/1.77 3.93/1.77 (0) QTRS 3.93/1.77 (1) QTRS Reverse [EQUIVALENT, 0 ms] 3.93/1.77 (2) QTRS 3.93/1.77 (3) Strip Symbols Proof [SOUND, 0 ms] 3.93/1.77 (4) QTRS 3.93/1.77 (5) RFCMatchBoundsTRSProof [EQUIVALENT, 0 ms] 3.93/1.77 (6) YES 3.93/1.77 3.93/1.77 3.93/1.77 ---------------------------------------- 3.93/1.77 3.93/1.77 (0) 3.93/1.77 Obligation: 3.93/1.77 Q restricted rewrite system: 3.93/1.77 The TRS R consists of the following rules: 3.93/1.77 3.93/1.77 a(b(a(a(a(a(x1)))))) -> a(a(a(a(a(b(a(a(b(a(b(a(b(x1))))))))))))) 3.93/1.77 3.93/1.77 Q is empty. 3.93/1.77 3.93/1.77 ---------------------------------------- 3.93/1.77 3.93/1.77 (1) QTRS Reverse (EQUIVALENT) 3.93/1.77 We applied the QTRS Reverse Processor [REVERSE]. 3.93/1.77 ---------------------------------------- 3.93/1.77 3.93/1.77 (2) 3.93/1.77 Obligation: 3.93/1.77 Q restricted rewrite system: 3.93/1.77 The TRS R consists of the following rules: 3.93/1.77 3.93/1.77 a(a(a(a(b(a(x1)))))) -> b(a(b(a(b(a(a(b(a(a(a(a(a(x1))))))))))))) 3.93/1.77 3.93/1.77 Q is empty. 3.93/1.77 3.93/1.77 ---------------------------------------- 3.93/1.77 3.93/1.77 (3) Strip Symbols Proof (SOUND) 3.93/1.77 We were given the following TRS: 3.93/1.77 3.93/1.77 a(a(a(a(b(a(x1)))))) -> b(a(b(a(b(a(a(b(a(a(a(a(a(x1))))))))))))) 3.93/1.77 3.93/1.77 By stripping symbols from the only rule of the system, we obtained the following TRS [ENDRULLIS]: 3.93/1.77 3.93/1.77 a(a(a(a(b(x))))) -> b(a(b(a(b(a(a(b(a(a(a(a(x)))))))))))) 3.93/1.77 3.93/1.77 ---------------------------------------- 3.93/1.77 3.93/1.77 (4) 3.93/1.77 Obligation: 3.93/1.77 Q restricted rewrite system: 3.93/1.77 The TRS R consists of the following rules: 3.93/1.77 3.93/1.77 a(a(a(a(b(x))))) -> b(a(b(a(b(a(a(b(a(a(a(a(x)))))))))))) 3.93/1.77 3.93/1.77 Q is empty. 3.93/1.77 3.93/1.77 ---------------------------------------- 3.93/1.77 3.93/1.77 (5) RFCMatchBoundsTRSProof (EQUIVALENT) 3.93/1.77 Termination of the TRS R could be shown with a Match Bound [MATCHBOUNDS1,MATCHBOUNDS2] of 1. This implies Q-termination of R. 3.93/1.77 The following rules were used to construct the certificate: 3.93/1.77 3.93/1.77 a(a(a(a(b(x))))) -> b(a(b(a(b(a(a(b(a(a(a(a(x)))))))))))) 3.93/1.77 3.93/1.77 The certificate found is represented by the following graph. 3.93/1.77 The certificate consists of the following enumerated nodes: 3.93/1.77 508, 509, 510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528, 529, 530, 531 3.93/1.77 3.93/1.77 Node 508 is start node and node 509 is final node. 3.93/1.77 3.93/1.77 Those nodes are connected through the following edges: 3.93/1.77 3.93/1.77 * 508 to 510 labelled b_1(0)* 509 to 509 labelled #_1(0)* 510 to 511 labelled a_1(0)* 511 to 512 labelled b_1(0)* 512 to 513 labelled a_1(0)* 513 to 514 labelled b_1(0)* 514 to 515 labelled a_1(0)* 515 to 516 labelled a_1(0)* 516 to 517 labelled b_1(0)* 517 to 518 labelled a_1(0)* 517 to 521 labelled b_1(1)* 518 to 519 labelled a_1(0)* 518 to 521 labelled b_1(1)* 519 to 520 labelled a_1(0)* 519 to 521 labelled b_1(1)* 520 to 509 labelled a_1(0)* 520 to 521 labelled b_1(1)* 521 to 522 labelled a_1(1)* 522 to 523 labelled b_1(1)* 523 to 524 labelled a_1(1)* 524 to 525 labelled b_1(1)* 525 to 526 labelled a_1(1)* 526 to 527 labelled a_1(1)* 527 to 528 labelled b_1(1)* 528 to 529 labelled a_1(1)* 528 to 521 labelled b_1(1)* 529 to 530 labelled a_1(1)* 529 to 521 labelled b_1(1)* 530 to 531 labelled a_1(1)* 530 to 521 labelled b_1(1)* 531 to 509 labelled a_1(1)* 531 to 521 labelled b_1(1) 3.93/1.77 3.93/1.77 3.93/1.77 ---------------------------------------- 3.93/1.77 3.93/1.77 (6) 3.93/1.77 YES 3.93/1.80 EOF popout

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all output return to SRS_Standard 2019-03-29 03.29