details

property	value
status	complete
benchmark	aabaaabaaba-aaabaabaabaaab.srs.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n160.star.cs.uiowa.edu
space	Wenzel_16

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	2.71963 seconds
cpu usage	4.52162
user time	4.32961
system time	0.19201
max virtual memory	1.9739368E7
max residence set size	396096.0

stage attributes

key	value
starexec-result	YES

output

3.85/1.74 YES 4.48/2.67 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 4.48/2.67 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 4.48/2.67 4.48/2.67 4.48/2.67 Termination w.r.t. Q of the given QTRS could be proven: 4.48/2.67 4.48/2.67 (0) QTRS 4.48/2.67 (1) QTRS Reverse [EQUIVALENT, 0 ms] 4.48/2.67 (2) QTRS 4.48/2.67 (3) Strip Symbols Proof [SOUND, 0 ms] 4.48/2.67 (4) QTRS 4.48/2.67 (5) RFCMatchBoundsTRSProof [EQUIVALENT, 0 ms] 4.48/2.67 (6) YES 4.48/2.67 4.48/2.67 4.48/2.67 ---------------------------------------- 4.48/2.67 4.48/2.67 (0) 4.48/2.67 Obligation: 4.48/2.67 Q restricted rewrite system: 4.48/2.67 The TRS R consists of the following rules: 4.48/2.67 4.48/2.67 a(a(b(a(a(a(b(a(a(b(a(x1))))))))))) -> a(a(a(b(a(a(b(a(a(b(a(a(a(b(x1)))))))))))))) 4.48/2.67 4.48/2.67 Q is empty. 4.48/2.67 4.48/2.67 ---------------------------------------- 4.48/2.67 4.48/2.67 (1) QTRS Reverse (EQUIVALENT) 4.48/2.67 We applied the QTRS Reverse Processor [REVERSE]. 4.48/2.67 ---------------------------------------- 4.48/2.67 4.48/2.67 (2) 4.48/2.67 Obligation: 4.48/2.67 Q restricted rewrite system: 4.48/2.67 The TRS R consists of the following rules: 4.48/2.67 4.48/2.67 a(b(a(a(b(a(a(a(b(a(a(x1))))))))))) -> b(a(a(a(b(a(a(b(a(a(b(a(a(a(x1)))))))))))))) 4.48/2.67 4.48/2.67 Q is empty. 4.48/2.67 4.48/2.67 ---------------------------------------- 4.48/2.67 4.48/2.67 (3) Strip Symbols Proof (SOUND) 4.48/2.67 We were given the following TRS: 4.48/2.67 4.48/2.67 a(b(a(a(b(a(a(a(b(a(a(x1))))))))))) -> b(a(a(a(b(a(a(b(a(a(b(a(a(a(x1)))))))))))))) 4.48/2.67 4.48/2.67 By stripping symbols from the only rule of the system, we obtained the following TRS [ENDRULLIS]: 4.48/2.67 4.48/2.67 a(b(a(a(b(a(a(a(b(a(x)))))))))) -> b(a(a(a(b(a(a(b(a(a(b(a(a(x))))))))))))) 4.48/2.67 4.48/2.67 ---------------------------------------- 4.48/2.67 4.48/2.67 (4) 4.48/2.67 Obligation: 4.48/2.67 Q restricted rewrite system: 4.48/2.67 The TRS R consists of the following rules: 4.48/2.67 4.48/2.67 a(b(a(a(b(a(a(a(b(a(x)))))))))) -> b(a(a(a(b(a(a(b(a(a(b(a(a(x))))))))))))) 4.48/2.67 4.48/2.67 Q is empty. 4.48/2.67 4.48/2.67 ---------------------------------------- 4.48/2.67 4.48/2.67 (5) RFCMatchBoundsTRSProof (EQUIVALENT) 4.48/2.67 Termination of the TRS R could be shown with a Match Bound [MATCHBOUNDS1,MATCHBOUNDS2] of 1. This implies Q-termination of R. 4.48/2.67 The following rules were used to construct the certificate: 4.48/2.67 4.48/2.67 a(b(a(a(b(a(a(a(b(a(x)))))))))) -> b(a(a(a(b(a(a(b(a(a(b(a(a(x))))))))))))) 4.48/2.67 4.48/2.67 The certificate found is represented by the following graph. 4.48/2.67 The certificate consists of the following enumerated nodes: 4.48/2.67 614, 615, 616, 617, 618, 619, 620, 621, 622, 623, 624, 625, 626, 627, 628, 629, 630, 631, 632, 633, 634, 635, 636, 637, 638, 639 4.48/2.67 4.48/2.67 Node 614 is start node and node 615 is final node. 4.48/2.67 4.48/2.67 Those nodes are connected through the following edges: 4.48/2.67 4.48/2.67 * 614 to 616 labelled b_1(0)* 615 to 615 labelled #_1(0)* 616 to 617 labelled a_1(0)* 617 to 618 labelled a_1(0)* 618 to 619 labelled a_1(0)* 619 to 620 labelled b_1(0)* 620 to 621 labelled a_1(0)* 621 to 622 labelled a_1(0)* 621 to 628 labelled b_1(1)* 622 to 623 labelled b_1(0)* 623 to 624 labelled a_1(0)* 624 to 625 labelled a_1(0)* 624 to 628 labelled b_1(1)* 625 to 626 labelled b_1(0)* 626 to 627 labelled a_1(0)* 627 to 615 labelled a_1(0)* 627 to 628 labelled b_1(1)* 628 to 629 labelled a_1(1)* 629 to 630 labelled a_1(1)* 630 to 631 labelled a_1(1)* 631 to 632 labelled b_1(1)* 632 to 633 labelled a_1(1)* 633 to 634 labelled a_1(1)* 633 to 628 labelled b_1(1)* 634 to 635 labelled b_1(1)* 635 to 636 labelled a_1(1)* 636 to 637 labelled a_1(1)* 636 to 628 labelled b_1(1)* 637 to 638 labelled b_1(1)* 638 to 639 labelled a_1(1)* 639 to 615 labelled a_1(1)* 639 to 628 labelled b_1(1) 4.48/2.67 4.48/2.67 4.48/2.67 ---------------------------------------- 4.48/2.67 4.48/2.67 (6) 4.48/2.67 YES 4.49/2.71 EOF popout

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all output return to SRS_Standard 2019-03-29 03.29