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SRS_Standard 2019-03-29 03.29 pair #432293994
details
property
value
status
complete
benchmark
aprove02.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n071.star.cs.uiowa.edu
space
Secret_06_SRS
run statistics
property
value
solver
ttt2-1.19
configuration
ttt2
runtime (wallclock)
2.48921 seconds
cpu usage
8.36979
user time
7.28719
system time
1.0826
max virtual memory
3788604.0
max residence set size
88060.0
stage attributes
key
value
starexec-result
YES
output
8.27/2.47 YES 8.27/2.48 8.27/2.48 Problem: 8.27/2.48 v(s(x1)) -> s(p(p(s(s(s(s(s(s(s(s(w(p(p(s(s(p(s(p(s(x1)))))))))))))))))))) 8.27/2.48 v(0(x1)) -> p(p(s(s(0(p(p(s(s(s(s(s(x1)))))))))))) 8.27/2.48 w(s(x1)) -> s(s(s(s(s(s(p(p(s(s(v(p(p(s(s(s(p(p(s(s(x1)))))))))))))))))))) 8.27/2.48 w(0(x1)) -> p(s(p(p(p(p(p(p(p(p(s(s(0(s(s(s(s(s(s(x1))))))))))))))))))) 8.27/2.48 p(p(s(x1))) -> p(x1) 8.27/2.48 p(s(x1)) -> x1 8.27/2.48 p(0(x1)) -> 0(s(s(s(s(s(s(s(p(s(x1)))))))))) 8.27/2.48 8.27/2.48 Proof: 8.27/2.48 Bounds Processor: 8.27/2.48 bound: 2 8.27/2.48 enrichment: match 8.27/2.48 automaton: 8.27/2.48 final states: {66,2,65,51,33,22,1} 8.27/2.48 transitions: 8.27/2.48 f50() -> 2* 8.27/2.48 s0(70) -> 71* 8.27/2.48 s0(50) -> 33* 8.27/2.48 s0(45) -> 46* 8.27/2.48 s0(35) -> 36* 8.27/2.48 s0(30) -> 31* 8.27/2.48 s0(25) -> 26* 8.27/2.48 s0(15) -> 16* 8.27/2.48 s0(5) -> 67* 8.27/2.48 s0(67) -> 68* 8.27/2.48 s0(47) -> 48* 8.27/2.48 s0(42) -> 43* 8.27/2.48 s0(37) -> 38* 8.27/2.48 s0(17) -> 18* 8.27/2.48 s0(12) -> 13* 8.27/2.48 s0(7) -> 8* 8.27/2.48 s0(2) -> 3* 8.27/2.48 s0(69) -> 70* 8.27/2.48 s0(54) -> 55* 8.27/2.48 s0(49) -> 50* 8.27/2.48 s0(29) -> 30* 8.27/2.48 s0(24) -> 25* 8.27/2.48 s0(14) -> 15* 8.27/2.48 s0(4) -> 5* 8.27/2.48 s0(71) -> 72* 8.27/2.48 s0(46) -> 47* 8.27/2.48 s0(41) -> 42* 8.27/2.48 s0(36) -> 37* 8.27/2.48 s0(26) -> 52* 8.27/2.48 s0(21) -> 1* 8.27/2.48 s0(16) -> 17* 8.27/2.48 s0(11) -> 12* 8.27/2.48 s0(6) -> 7* 8.27/2.48 s0(68) -> 69* 8.27/2.48 s0(63) -> 64* 8.27/2.48 s0(53) -> 54* 8.27/2.48 s0(48) -> 49* 8.27/2.48 s0(23) -> 24* 8.27/2.48 s0(18) -> 19* 8.27/2.48 s0(13) -> 14* 8.27/2.48 s0(3) -> 23* 8.27/2.48 p0(60) -> 61* 8.27/2.48 p0(55) -> 56* 8.27/2.48 p0(20) -> 21* 8.27/2.48 p0(5) -> 6* 8.27/2.48 p0(62) -> 63* 8.27/2.48 p0(57) -> 58* 8.27/2.48 p0(32) -> 22* 8.27/2.48 p0(27) -> 28* 8.27/2.48 p0(2) -> 65* 8.27/2.48 p0(64) -> 51* 8.27/2.48 p0(59) -> 60* 8.27/2.48 p0(44) -> 45* 8.27/2.48 p0(39) -> 40* 8.27/2.48 p0(34) -> 35* 8.27/2.48 p0(19) -> 20* 8.27/2.48 p0(9) -> 10* 8.27/2.48 p0(61) -> 62* 8.27/2.48 p0(56) -> 57* 8.27/2.48 p0(31) -> 32* 8.27/2.48 p0(26) -> 27* 8.27/2.48 p0(58) -> 59* 8.27/2.48 p0(43) -> 44* 8.27/2.48 p0(38) -> 39* 8.27/2.48 p0(23) -> 34* 8.27/2.48 p0(8) -> 9* 8.27/2.48 p0(3) -> 4* 8.27/2.48 w0(10) -> 11* 8.27/2.48 00(72) -> 66* 8.27/2.48 00(52) -> 53* 8.27/2.48 00(28) -> 29* 8.27/2.48 v0(40) -> 41* 8.27/2.48 p1(75) -> 76* 8.27/2.48 p1(152) -> 153* 8.27/2.48 p1(147) -> 148* 8.27/2.48 p1(137) -> 138* 8.27/2.48 p1(77) -> 78* 8.27/2.48 p1(204) -> 205* 8.27/2.48 p1(99) -> 100* 8.27/2.48 p1(226) -> 227* 8.27/2.48 p1(136) -> 137* 8.27/2.48 p1(131) -> 132*
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