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SRS_Standard 2019-03-29 03.29 pair #432294272
details
property
value
status
complete
benchmark
hom01.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n149.star.cs.uiowa.edu
space
Trafo_06
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
78.0651 seconds
cpu usage
308.817
user time
278.649
system time
30.168
max virtual memory
1.170239E8
max residence set size
2307128.0
stage attributes
key
value
starexec-result
YES
output
301.13/76.14 YES 301.40/76.24 property Termination 301.92/76.30 has value True 305.01/77.10 for SRS ( [a, a, b, d, b, d, a] -> [a, a, c, a, a, b, d], [a, a, c] -> [c, c, a, a], [c, c, c] -> [b, d, c, b, d]) 305.01/77.10 reason 305.01/77.10 remap for 3 rules 305.01/77.10 property Termination 305.01/77.10 has value True 305.01/77.11 for SRS ( [0, 0, 1, 2, 1, 2, 0] -> [0, 0, 3, 0, 0, 1, 2], [0, 0, 3] -> [3, 3, 0, 0], [3, 3, 3] -> [1, 2, 3, 1, 2]) 305.01/77.11 reason 305.01/77.11 reverse each lhs and rhs 305.01/77.11 property Termination 305.01/77.11 has value True 305.41/77.20 for SRS ( [0, 2, 1, 2, 1, 0, 0] -> [2, 1, 0, 0, 3, 0, 0], [3, 0, 0] -> [0, 0, 3, 3], [3, 3, 3] -> [2, 1, 3, 2, 1]) 305.41/77.20 reason 305.41/77.20 DP transform 305.41/77.20 property Termination 305.41/77.20 has value True 305.67/77.28 for SRS ( [0, 2, 1, 2, 1, 0, 0] ->= [2, 1, 0, 0, 3, 0, 0], [3, 0, 0] ->= [0, 0, 3, 3], [3, 3, 3] ->= [2, 1, 3, 2, 1], [0#, 2, 1, 2, 1, 0, 0] |-> [0#, 0, 3, 0, 0], [0#, 2, 1, 2, 1, 0, 0] |-> [0#, 3, 0, 0], [0#, 2, 1, 2, 1, 0, 0] |-> [3#, 0, 0], [3#, 0, 0] |-> [0#, 0, 3, 3], [3#, 0, 0] |-> [0#, 3, 3], [3#, 0, 0] |-> [3#, 3], [3#, 0, 0] |-> [3#], [3#, 3, 3] |-> [3#, 2, 1]) 305.67/77.28 reason 305.67/77.28 remap for 11 rules 305.67/77.28 property Termination 305.67/77.28 has value True 306.88/77.55 for SRS ( [0, 1, 2, 1, 2, 0, 0] ->= [1, 2, 0, 0, 3, 0, 0], [3, 0, 0] ->= [0, 0, 3, 3], [3, 3, 3] ->= [1, 2, 3, 1, 2], [4, 1, 2, 1, 2, 0, 0] |-> [4, 0, 3, 0, 0], [4, 1, 2, 1, 2, 0, 0] |-> [4, 3, 0, 0], [4, 1, 2, 1, 2, 0, 0] |-> [5, 0, 0], [5, 0, 0] |-> [4, 0, 3, 3], [5, 0, 0] |-> [4, 3, 3], [5, 0, 0] |-> [5, 3], [5, 0, 0] |-> [5], [5, 3, 3] |-> [5, 1, 2]) 306.88/77.55 reason 306.88/77.55 EDG has 1 SCCs 306.88/77.55 property Termination 306.88/77.55 has value True 306.88/77.55 for SRS ( [4, 1, 2, 1, 2, 0, 0] |-> [4, 0, 3, 0, 0], [4, 1, 2, 1, 2, 0, 0] |-> [5, 0, 0], [5, 0, 0] |-> [5], [5, 0, 0] |-> [5, 3], [5, 0, 0] |-> [4, 3, 3], [4, 1, 2, 1, 2, 0, 0] |-> [4, 3, 0, 0], [5, 0, 0] |-> [4, 0, 3, 3], [0, 1, 2, 1, 2, 0, 0] ->= [1, 2, 0, 0, 3, 0, 0], [3, 0, 0] ->= [0, 0, 3, 3], [3, 3, 3] ->= [1, 2, 3, 1, 2]) 306.88/77.55 reason 306.88/77.55 Matrix { monotone = Weak, domain = Arctic, bits = 4, dim = 3, solver = Minisatapi, verbose = False, tracing = True} 306.88/77.55 interpretation 306.88/77.55 0 / 0A 0A 0A \ 306.88/77.55 | -3A -3A 0A | 306.88/77.55 \ -3A -3A -3A / 306.88/77.55 1 / 0A 0A 0A \ 306.88/77.55 | -3A 0A 0A | 306.88/77.55 \ -3A -3A 0A / 306.88/77.55 2 / 0A 0A 0A \ 306.88/77.55 | 0A 0A 0A | 306.88/77.55 \ -3A 0A 0A / 306.88/77.55 3 / 0A 0A 0A \ 306.88/77.55 | 0A 0A 0A | 306.88/77.55 \ -3A 0A 0A / 306.88/77.55 4 / 9A 12A 12A \ 306.88/77.55 | 9A 12A 12A | 306.88/77.55 \ 9A 12A 12A / 306.88/77.55 5 / 12A 12A 12A \ 306.88/77.55 | 12A 12A 12A | 306.88/77.55 \ 12A 12A 12A / 306.88/77.55 [4, 1, 2, 1, 2, 0, 0] |-> [4, 0, 3, 0, 0] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 12A 12A 12A \ / 9A 9A 9A \ True True 306.88/77.55 | 12A 12A 12A | | 9A 9A 9A | 306.88/77.55 \ 12A 12A 12A / \ 9A 9A 9A / 306.88/77.55 [4, 1, 2, 1, 2, 0, 0] |-> [5, 0, 0] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 12A 12A 12A \ / 12A 12A 12A \ True False 306.88/77.55 | 12A 12A 12A | | 12A 12A 12A | 306.88/77.55 \ 12A 12A 12A / \ 12A 12A 12A / 306.88/77.55 [5, 0, 0] |-> [5] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 12A 12A 12A \ / 12A 12A 12A \ True False 306.88/77.55 | 12A 12A 12A | | 12A 12A 12A | 306.88/77.55 \ 12A 12A 12A / \ 12A 12A 12A / 306.88/77.55 [5, 0, 0] |-> [5, 3] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 12A 12A 12A \ / 12A 12A 12A \ True False 306.88/77.55 | 12A 12A 12A | | 12A 12A 12A | 306.88/77.55 \ 12A 12A 12A / \ 12A 12A 12A / 306.88/77.55 [5, 0, 0] |-> [4, 3, 3] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 12A 12A 12A \ / 12A 12A 12A \ True False 306.88/77.55 | 12A 12A 12A | | 12A 12A 12A | 306.88/77.55 \ 12A 12A 12A / \ 12A 12A 12A / 306.88/77.55 [4, 1, 2, 1, 2, 0, 0] |-> [4, 3, 0, 0] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 12A 12A 12A \ / 12A 12A 12A \ True False 306.88/77.55 | 12A 12A 12A | | 12A 12A 12A | 306.88/77.55 \ 12A 12A 12A / \ 12A 12A 12A / 306.88/77.55 [5, 0, 0] |-> [4, 0, 3, 3] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 12A 12A 12A \ / 12A 12A 12A \ True False 306.88/77.55 | 12A 12A 12A | | 12A 12A 12A | 306.88/77.55 \ 12A 12A 12A / \ 12A 12A 12A / 306.88/77.55 [0, 1, 2, 1, 2, 0, 0] ->= [1, 2, 0, 0, 3, 0, 0] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 0A 0A 0A \ / 0A 0A 0A \ True False 306.88/77.55 | 0A 0A 0A | | 0A 0A 0A | 306.88/77.55 \ -3A -3A -3A / \ -3A -3A -3A / 306.88/77.55 [3, 0, 0] ->= [0, 0, 3, 3] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 0A 0A 0A \ / 0A 0A 0A \ True False 306.88/77.55 | 0A 0A 0A | | -3A -3A -3A | 306.88/77.55 \ -3A -3A -3A / \ -3A -3A -3A / 306.88/77.55 [3, 3, 3] ->= [1, 2, 3, 1, 2] 306.88/77.55 lhs rhs ge gt 306.88/77.55 / 0A 0A 0A \ / 0A 0A 0A \ True False 306.88/77.55 | 0A 0A 0A | | 0A 0A 0A | 306.88/77.55 \ 0A 0A 0A / \ 0A 0A 0A /
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