details

property	value
status	complete
benchmark	random-400.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n138.star.cs.uiowa.edu
space	Waldmann_19

run statistics

property	value
solver	matchbox-2019-03-17
configuration	std.sh
runtime (wallclock)	11.1047 seconds
cpu usage	43.8696
user time	38.4729
system time	5.39663
max virtual memory	1.16752008E8
max residence set size	1212976.0

stage attributes

key	value
starexec-result	NO

output

27.55/6.97 NO 27.55/6.97 property Termination 27.55/6.97 has value False 27.55/6.97 for SRS ( [b, b, a, b] -> [a, a, a, a], [a, b, a, a] -> [a, b, b, b], [a, b, a, a] -> [b, a, b, b]) 27.55/6.97 reason 27.55/6.97 remap for 3 rules 27.55/6.97 property Termination 27.55/6.97 has value False 27.55/6.97 for SRS ( [0, 0, 1, 0] -> [1, 1, 1, 1], [1, 0, 1, 1] -> [1, 0, 0, 0], [1, 0, 1, 1] -> [0, 1, 0, 0]) 27.55/6.97 reason 27.55/6.97 looping SRS derivation 27.55/6.97 Closure source : aabaabbbaabbbaa 27.55/6.97 target : aabaabbbaabbbaa 27.55/6.97 steps : 60 27.55/6.97 strict : True 27.55/6.97 last_rule_app_source : 0 27.55/6.97 last_rule_app_target : 1 27.55/6.97 reason : Overlap (Inside 1) 27.55/6.97 Overlap (Inside 3) 27.55/6.97 Overlap (Inside 6) 27.55/6.97 Overlap (Inside 8) 27.55/6.97 Overlap (Inside 6) 27.55/6.97 Overlap (Inside 1) 27.55/6.97 Overlap (Inside 3) 27.55/6.97 Overlap (Inside 0) 27.55/6.97 Overlap (Inside 4) 27.55/6.97 Overlap (Inside 7) 27.55/6.97 Overlap (Inside 5) 27.55/6.97 Overlap (Inside 2) 27.55/6.97 Overlap (Inside 3) 27.55/6.97 Overlap (Inside 5) 27.55/6.97 Overlap (Inside 8) 27.55/6.97 Overlap (Inside 3) 27.55/6.97 Overlap (Inside 5) 27.55/6.97 Overlap (Inside 6) 27.55/6.97 Overlap (Inside 9) 27.55/6.97 Overlap (Inside 11) 27.55/6.97 Overlap (Inside 7) 27.55/6.97 Overlap (Inside 2) 27.55/6.97 Overlap (Inside 4) 27.55/6.97 Overlap (Inside 1) 27.55/6.97 Overlap (Inside 5) 27.55/6.97 Overlap (Inside 8) 27.55/6.97 Overlap (Inside 6) 27.55/6.97 Overlap (Inside 3) 27.55/6.97 Overlap (Inside 4) 27.55/6.97 Overlap (Inside 6) 27.55/6.97 Overlap (Inside 9) 27.55/6.97 Overlap (Inside 4) 27.55/6.97 Overlap (Inside 6) 27.55/6.97 Overlap (Inside 3) 27.55/6.97 Overlap (Inside 7) 27.55/6.97 Overlap (Inside 10) 27.55/6.97 Overlap (Inside 8) 27.55/6.97 Overlap (Inside 5) 27.55/6.97 Overlap (Inside 2) 27.55/6.97 Overlap (Inside 6) 27.55/6.97 Overlap (Inside 9) 27.55/6.97 Overlap (Inside 7) 27.55/6.97 Overlap (Inside 4) 27.55/6.97 Overlap (Inside 5) 27.55/6.97 Overlap (Inside 7) 27.55/6.97 Overlap (Inside 10) 27.55/6.97 Overlap (Inside 5) 27.55/6.97 Overlap (Inside 7) 27.55/6.97 Overlap (Inside 8) 27.55/6.97 Overlap (Right 3) 27.55/6.97 Overlap (Inside 9) 27.55/6.97 Overlap (Inside 4) 27.55/6.97 Overlap (Inside 6) 27.55/6.97 Overlap (Inside 3) 27.55/6.99 Overlap (Inside 7) 27.85/7.11 Overlap (Right 2) 28.24/7.15 Overlap (Right 1) 28.49/7.20 Overlap (Right 2) 28.49/7.25 Overlap (Right 1) 28.72/7.29 Rule 0 28.72/7.33 Rule 1 29.10/7.36 Rule 0 29.10/7.38 Rule 2 29.28/7.42 Rule 0 29.49/7.46 Rule 2 29.87/7.62 Rule 2 30.42/7.70 Rule 0 30.69/7.77 Rule 2 30.92/7.85 Rule 2 31.68/8.02 Rule 0 31.68/8.06 Rule 2 31.93/8.11 Rule 0 31.93/8.15 Rule 1 32.42/8.23 Rule 2 33.09/8.42 Rule 0 33.86/8.59 Rule 2 34.97/8.88 Rule 0 34.97/8.88 Rule 2 34.97/8.88 Rule 0 34.97/8.88 Rule 2 34.97/8.88 Rule 2 34.97/8.88 Rule 0 34.97/8.88 Rule 2 popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to SRS_Standard 2019-03-29 03.29