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SRS_Standard 2019-03-29 03.29 pair #432295202
details
property
value
status
complete
benchmark
09.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n083.star.cs.uiowa.edu
space
Zantema_06
run statistics
property
value
solver
matchbox-2019-03-17
configuration
std.sh
runtime (wallclock)
4.79311 seconds
cpu usage
18.4912
user time
16.0401
system time
2.45107
max virtual memory
1.16616832E8
max residence set size
799612.0
stage attributes
key
value
starexec-result
YES
output
16.92/4.37 YES 16.92/4.37 property Termination 17.24/4.37 has value True 17.27/4.38 for SRS ( [a, s] -> [s, a], [b, a, b, s] -> [a, b, s, a], [b, a, b, b] -> [c, s], [c, s] -> [a, b, a, b], [a, b, a, a] -> [b, a, b, a]) 17.27/4.38 reason 17.27/4.39 remap for 5 rules 17.27/4.39 property Termination 17.27/4.39 has value True 17.27/4.40 for SRS ( [0, 1] -> [1, 0], [2, 0, 2, 1] -> [0, 2, 1, 0], [2, 0, 2, 2] -> [3, 1], [3, 1] -> [0, 2, 0, 2], [0, 2, 0, 0] -> [2, 0, 2, 0]) 17.27/4.40 reason 17.27/4.40 reverse each lhs and rhs 17.27/4.40 property Termination 17.27/4.40 has value True 17.35/4.41 for SRS ( [1, 0] -> [0, 1], [1, 2, 0, 2] -> [0, 1, 2, 0], [2, 2, 0, 2] -> [1, 3], [1, 3] -> [2, 0, 2, 0], [0, 0, 2, 0] -> [0, 2, 0, 2]) 17.35/4.42 reason 17.35/4.42 DP transform 17.35/4.42 property Termination 17.35/4.42 has value True 17.41/4.45 for SRS ( [1, 0] ->= [0, 1], [1, 2, 0, 2] ->= [0, 1, 2, 0], [2, 2, 0, 2] ->= [1, 3], [1, 3] ->= [2, 0, 2, 0], [0, 0, 2, 0] ->= [0, 2, 0, 2], [1#, 0] |-> [0#, 1], [1#, 0] |-> [1#], [1#, 2, 0, 2] |-> [0#, 1, 2, 0], [1#, 2, 0, 2] |-> [1#, 2, 0], [1#, 2, 0, 2] |-> [2#, 0], [1#, 2, 0, 2] |-> [0#], [2#, 2, 0, 2] |-> [1#, 3], [1#, 3] |-> [2#, 0, 2, 0], [1#, 3] |-> [0#, 2, 0], [1#, 3] |-> [2#, 0], [1#, 3] |-> [0#], [0#, 0, 2, 0] |-> [0#, 2, 0, 2], [0#, 0, 2, 0] |-> [2#, 0, 2], [0#, 0, 2, 0] |-> [0#, 2], [0#, 0, 2, 0] |-> [2#]) 17.41/4.45 reason 17.41/4.45 remap for 20 rules 17.41/4.45 property Termination 17.41/4.45 has value True 17.41/4.46 for SRS ( [0, 1] ->= [1, 0], [0, 2, 1, 2] ->= [1, 0, 2, 1], [2, 2, 1, 2] ->= [0, 3], [0, 3] ->= [2, 1, 2, 1], [1, 1, 2, 1] ->= [1, 2, 1, 2], [4, 1] |-> [5, 0], [4, 1] |-> [4], [4, 2, 1, 2] |-> [5, 0, 2, 1], [4, 2, 1, 2] |-> [4, 2, 1], [4, 2, 1, 2] |-> [6, 1], [4, 2, 1, 2] |-> [5], [6, 2, 1, 2] |-> [4, 3], [4, 3] |-> [6, 1, 2, 1], [4, 3] |-> [5, 2, 1], [4, 3] |-> [6, 1], [4, 3] |-> [5], [5, 1, 2, 1] |-> [5, 2, 1, 2], [5, 1, 2, 1] |-> [6, 1, 2], [5, 1, 2, 1] |-> [5, 2], [5, 1, 2, 1] |-> [6]) 17.41/4.46 reason 17.41/4.46 weights 17.41/4.47 Map [(0, 3/2), (1, 3/2), (2, 3/2), (3, 9/2), (4, 1/2), (6, 1/2)] 17.41/4.47 17.41/4.47 property Termination 17.41/4.47 has value True 17.41/4.47 for SRS ( [0, 1] ->= [1, 0], [0, 2, 1, 2] ->= [1, 0, 2, 1], [2, 2, 1, 2] ->= [0, 3], [0, 3] ->= [2, 1, 2, 1], [1, 1, 2, 1] ->= [1, 2, 1, 2], [6, 2, 1, 2] |-> [4, 3], [4, 3] |-> [6, 1, 2, 1], [5, 1, 2, 1] |-> [5, 2, 1, 2]) 17.41/4.47 reason 17.41/4.47 EDG has 2 SCCs 17.41/4.47 property Termination 17.41/4.47 has value True 17.41/4.47 for SRS ( [5, 1, 2, 1] |-> [5, 2, 1, 2], [0, 1] ->= [1, 0], [0, 2, 1, 2] ->= [1, 0, 2, 1], [2, 2, 1, 2] ->= [0, 3], [0, 3] ->= [2, 1, 2, 1], [1, 1, 2, 1] ->= [1, 2, 1, 2]) 17.41/4.47 reason 17.41/4.47 Matrix { monotone = Weak, domain = Arctic, bits = 4, dim = 3, solver = Minisatapi, verbose = False, tracing = True} 17.41/4.47 interpretation 17.41/4.47 0 / 6A 6A 9A \ 17.41/4.47 | 6A 6A 6A | 17.41/4.47 \ 3A 3A 6A / 17.41/4.47 1 / 9A 9A 12A \ 17.41/4.47 | 9A 9A 9A | 17.41/4.47 \ 6A 6A 9A / 17.41/4.47 2 / 9A 9A 12A \ 17.41/4.47 | 6A 6A 9A | 17.41/4.47 \ 6A 6A 9A / 17.41/4.47 3 / 27A 27A 30A \ 17.41/4.47 | 27A 27A 30A | 17.41/4.47 \ 27A 27A 30A / 17.41/4.47 5 / 6A 9A 9A \ 17.41/4.47 | 6A 9A 9A | 17.41/4.47 \ 6A 9A 9A / 17.41/4.47 [5, 1, 2, 1] |-> [5, 2, 1, 2] 17.41/4.47 lhs rhs ge gt 17.41/4.47 / 36A 36A 39A \ / 33A 33A 36A \ True True 17.41/4.47 | 36A 36A 39A | | 33A 33A 36A | 17.41/4.47 \ 36A 36A 39A / \ 33A 33A 36A / 17.41/4.47 [0, 1] ->= [1, 0] 17.41/4.47 lhs rhs ge gt 17.41/4.47 / 15A 15A 18A \ / 15A 15A 18A \ True False 17.41/4.47 | 15A 15A 18A | | 15A 15A 18A | 17.41/4.47 \ 12A 12A 15A / \ 12A 12A 15A / 17.41/4.47 [0, 2, 1, 2] ->= [1, 0, 2, 1] 17.41/4.47 lhs rhs ge gt 17.41/4.47 / 33A 33A 36A \ / 33A 33A 36A \ True False 17.41/4.47 | 33A 33A 36A | | 33A 33A 36A | 17.41/4.47 \ 30A 30A 33A / \ 30A 30A 33A / 17.41/4.47 [2, 2, 1, 2] ->= [0, 3] 17.41/4.47 lhs rhs ge gt 17.41/4.47 / 36A 36A 39A \ / 36A 36A 39A \ True False 17.41/4.47 | 33A 33A 36A | | 33A 33A 36A | 17.41/4.47 \ 33A 33A 36A / \ 33A 33A 36A / 17.41/4.47 [0, 3] ->= [2, 1, 2, 1] 17.41/4.47 lhs rhs ge gt 17.41/4.47 / 36A 36A 39A \ / 36A 36A 39A \ True False 17.41/4.47 | 33A 33A 36A | | 33A 33A 36A | 17.41/4.47 \ 33A 33A 36A / \ 33A 33A 36A / 17.41/4.47 [1, 1, 2, 1] ->= [1, 2, 1, 2] 17.41/4.47 lhs rhs ge gt 17.41/4.47 / 36A 36A 39A \ / 36A 36A 39A \ True False 17.41/4.47 | 36A 36A 39A | | 36A 36A 39A | 17.41/4.47 \ 33A 33A 36A / \ 33A 33A 36A / 17.41/4.47 property Termination 17.41/4.47 has value True 17.41/4.47 for SRS ( [0, 1] ->= [1, 0], [0, 2, 1, 2] ->= [1, 0, 2, 1], [2, 2, 1, 2] ->= [0, 3], [0, 3] ->= [2, 1, 2, 1], [1, 1, 2, 1] ->= [1, 2, 1, 2]) 17.41/4.47 reason 17.41/4.47 EDG has 0 SCCs 17.41/4.47 17.41/4.47 property Termination 17.41/4.47 has value True 17.41/4.48 for SRS ( [6, 2, 1, 2] |-> [4, 3], [4, 3] |-> [6, 1, 2, 1], [0, 1] ->= [1, 0], [0, 2, 1, 2] ->= [1, 0, 2, 1], [2, 2, 1, 2] ->= [0, 3], [0, 3] ->= [2, 1, 2, 1], [1, 1, 2, 1] ->= [1, 2, 1, 2]) 17.41/4.48 reason 17.41/4.48 Matrix { monotone = Weak, domain = Arctic, bits = 4, dim = 2, solver = Minisatapi, verbose = False, tracing = True} 17.41/4.48 interpretation 17.41/4.48 0 / 4A 4A \ 17.41/4.48 \ 4A 4A / 17.41/4.48 1 / 2A 2A \ 17.41/4.48 \ 0A 0A /
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