Spaces
Explore
Communities
Statistics
Reports
Cluster
Status
Help
Runtime_Complexity_Full_Rewriting 2019-04-01 06.11 pair #433308016
details
property
value
status
complete
benchmark
MYNAT_complete_Z.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n123.star.cs.uiowa.edu
space
Transformed_CSR_04
run statistics
property
value
solver
AProVE
configuration
complexity
runtime (wallclock)
292.207 seconds
cpu usage
316.948
user time
314.01
system time
2.93796
max virtual memory
1.8279468E7
max residence set size
6362012.0
stage attributes
key
value
starexec-result
WORST_CASE(Omega(n^1), ?)
output
316.83/292.16 WORST_CASE(Omega(n^1), ?) 316.83/292.17 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 316.83/292.17 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 316.83/292.17 316.83/292.17 316.83/292.17 The Runtime Complexity (full) of the given CpxTRS could be proven to be BOUNDS(n^1, INF). 316.83/292.17 316.83/292.17 (0) CpxTRS 316.83/292.17 (1) RelTrsToDecreasingLoopProblemProof [LOWER BOUND(ID), 0 ms] 316.83/292.17 (2) TRS for Loop Detection 316.83/292.17 (3) DecreasingLoopProof [LOWER BOUND(ID), 124 ms] 316.83/292.17 (4) BEST 316.83/292.17 (5) proven lower bound 316.83/292.17 (6) LowerBoundPropagationProof [FINISHED, 0 ms] 316.83/292.17 (7) BOUNDS(n^1, INF) 316.83/292.17 (8) TRS for Loop Detection 316.83/292.17 316.83/292.17 316.83/292.17 ---------------------------------------- 316.83/292.17 316.83/292.17 (0) 316.83/292.17 Obligation: 316.83/292.17 The Runtime Complexity (full) of the given CpxTRS could be proven to be BOUNDS(n^1, INF). 316.83/292.17 316.83/292.17 316.83/292.17 The TRS R consists of the following rules: 316.83/292.17 316.83/292.17 U11(tt, V1, V2) -> U12(isNat(activate(V1)), activate(V2)) 316.83/292.17 U12(tt, V2) -> U13(isNat(activate(V2))) 316.83/292.17 U13(tt) -> tt 316.83/292.17 U21(tt, V1) -> U22(isNat(activate(V1))) 316.83/292.17 U22(tt) -> tt 316.83/292.17 U31(tt, V1, V2) -> U32(isNat(activate(V1)), activate(V2)) 316.83/292.17 U32(tt, V2) -> U33(isNat(activate(V2))) 316.83/292.17 U33(tt) -> tt 316.83/292.17 U41(tt, N) -> activate(N) 316.83/292.17 U51(tt, M, N) -> s(plus(activate(N), activate(M))) 316.83/292.17 U61(tt) -> 0 316.83/292.17 U71(tt, M, N) -> plus(x(activate(N), activate(M)), activate(N)) 316.83/292.17 and(tt, X) -> activate(X) 316.83/292.17 isNat(n__0) -> tt 316.83/292.17 isNat(n__plus(V1, V2)) -> U11(and(isNatKind(activate(V1)), n__isNatKind(activate(V2))), activate(V1), activate(V2)) 316.83/292.17 isNat(n__s(V1)) -> U21(isNatKind(activate(V1)), activate(V1)) 316.83/292.17 isNat(n__x(V1, V2)) -> U31(and(isNatKind(activate(V1)), n__isNatKind(activate(V2))), activate(V1), activate(V2)) 316.83/292.17 isNatKind(n__0) -> tt 316.83/292.17 isNatKind(n__plus(V1, V2)) -> and(isNatKind(activate(V1)), n__isNatKind(activate(V2))) 316.83/292.17 isNatKind(n__s(V1)) -> isNatKind(activate(V1)) 316.83/292.17 isNatKind(n__x(V1, V2)) -> and(isNatKind(activate(V1)), n__isNatKind(activate(V2))) 316.83/292.17 plus(N, 0) -> U41(and(isNat(N), n__isNatKind(N)), N) 316.83/292.17 plus(N, s(M)) -> U51(and(and(isNat(M), n__isNatKind(M)), n__and(isNat(N), n__isNatKind(N))), M, N) 316.83/292.17 x(N, 0) -> U61(and(isNat(N), n__isNatKind(N))) 316.83/292.17 x(N, s(M)) -> U71(and(and(isNat(M), n__isNatKind(M)), n__and(isNat(N), n__isNatKind(N))), M, N) 316.83/292.17 0 -> n__0 316.83/292.17 plus(X1, X2) -> n__plus(X1, X2) 316.83/292.17 isNatKind(X) -> n__isNatKind(X) 316.83/292.17 s(X) -> n__s(X) 316.83/292.17 x(X1, X2) -> n__x(X1, X2) 316.83/292.17 and(X1, X2) -> n__and(X1, X2) 316.83/292.17 activate(n__0) -> 0 316.83/292.17 activate(n__plus(X1, X2)) -> plus(X1, X2) 316.83/292.17 activate(n__isNatKind(X)) -> isNatKind(X) 316.83/292.17 activate(n__s(X)) -> s(X) 316.83/292.17 activate(n__x(X1, X2)) -> x(X1, X2) 316.83/292.17 activate(n__and(X1, X2)) -> and(X1, X2) 316.83/292.17 activate(X) -> X 316.83/292.17 316.83/292.17 S is empty. 316.83/292.17 Rewrite Strategy: FULL 316.83/292.17 ---------------------------------------- 316.83/292.17 316.83/292.17 (1) RelTrsToDecreasingLoopProblemProof (LOWER BOUND(ID)) 316.83/292.17 Transformed a relative TRS into a decreasing-loop problem. 316.83/292.17 ---------------------------------------- 316.83/292.17 316.83/292.17 (2) 316.83/292.17 Obligation: 316.83/292.17 Analyzing the following TRS for decreasing loops: 316.83/292.17 316.83/292.17 The Runtime Complexity (full) of the given CpxTRS could be proven to be BOUNDS(n^1, INF). 316.83/292.17 316.83/292.17 316.83/292.17 The TRS R consists of the following rules: 316.83/292.17 316.83/292.17 U11(tt, V1, V2) -> U12(isNat(activate(V1)), activate(V2)) 316.83/292.17 U12(tt, V2) -> U13(isNat(activate(V2))) 316.83/292.17 U13(tt) -> tt 316.83/292.17 U21(tt, V1) -> U22(isNat(activate(V1))) 316.83/292.17 U22(tt) -> tt 316.83/292.17 U31(tt, V1, V2) -> U32(isNat(activate(V1)), activate(V2)) 316.83/292.17 U32(tt, V2) -> U33(isNat(activate(V2))) 316.83/292.17 U33(tt) -> tt 316.83/292.17 U41(tt, N) -> activate(N) 316.83/292.17 U51(tt, M, N) -> s(plus(activate(N), activate(M))) 316.83/292.17 U61(tt) -> 0 316.83/292.17 U71(tt, M, N) -> plus(x(activate(N), activate(M)), activate(N)) 316.83/292.17 and(tt, X) -> activate(X) 316.83/292.17 isNat(n__0) -> tt 316.83/292.17 isNat(n__plus(V1, V2)) -> U11(and(isNatKind(activate(V1)), n__isNatKind(activate(V2))), activate(V1), activate(V2)) 316.83/292.17 isNat(n__s(V1)) -> U21(isNatKind(activate(V1)), activate(V1)) 316.83/292.17 isNat(n__x(V1, V2)) -> U31(and(isNatKind(activate(V1)), n__isNatKind(activate(V2))), activate(V1), activate(V2))
popout
output may be truncated. 'popout' for the full output.
job log
popout
actions
all output
return to Runtime_Complexity_Full_Rewriting 2019-04-01 06.11