details

property	value
status	complete
benchmark	ListReverseCyclicList.jar
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n168.star.cs.uiowa.edu
space	BMOG_CAV_12

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	3.33547 seconds
cpu usage	9.12192
user time	8.6834
system time	0.438525
max virtual memory	2.1029704E7
max residence set size	727628.0

stage attributes

key	value
starexec-result	YES

output

8.71/3.27 YES 8.71/3.28 proof of /export/starexec/sandbox/benchmark/theBenchmark.jar 8.71/3.28 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 8.71/3.28 8.71/3.28 8.71/3.28 termination of the given Bare JBC problem could be proven: 8.71/3.28 8.71/3.28 (0) Bare JBC problem 8.71/3.28 (1) BareJBCToJBCProof [EQUIVALENT, 95 ms] 8.71/3.28 (2) JBC problem 8.71/3.28 (3) JBCToGraph [EQUIVALENT, 427 ms] 8.71/3.28 (4) JBCTerminationGraph 8.71/3.28 (5) TerminationGraphToSCCProof [SOUND, 0 ms] 8.71/3.28 (6) AND 8.71/3.28 (7) JBCTerminationSCC 8.71/3.28 (8) SCCToIRSProof [SOUND, 143 ms] 8.71/3.28 (9) IRSwT 8.71/3.28 (10) IRSFormatTransformerProof [EQUIVALENT, 0 ms] 8.71/3.28 (11) IRSwT 8.71/3.28 (12) IRSwTTerminationDigraphProof [EQUIVALENT, 0 ms] 8.71/3.28 (13) IRSwT 8.71/3.28 (14) TempFilterProof [SOUND, 23 ms] 8.71/3.28 (15) IRSwT 8.71/3.28 (16) IRSwTToQDPProof [SOUND, 0 ms] 8.71/3.28 (17) QDP 8.71/3.28 (18) QDPSizeChangeProof [EQUIVALENT, 0 ms] 8.71/3.28 (19) YES 8.71/3.28 (20) JBCTerminationSCC 8.71/3.28 (21) SCCToIRSProof [SOUND, 30 ms] 8.71/3.28 (22) IRSwT 8.71/3.28 (23) IRSFormatTransformerProof [EQUIVALENT, 0 ms] 8.71/3.28 (24) IRSwT 8.71/3.28 (25) IRSwTTerminationDigraphProof [EQUIVALENT, 20 ms] 8.71/3.28 (26) IRSwT 8.71/3.28 (27) IntTRSCompressionProof [EQUIVALENT, 0 ms] 8.71/3.28 (28) IRSwT 8.71/3.28 (29) FilterProof [EQUIVALENT, 0 ms] 8.71/3.28 (30) IntTRS 8.71/3.28 (31) IntTRSCompressionProof [EQUIVALENT, 0 ms] 8.71/3.28 (32) IntTRS 8.71/3.28 (33) PolynomialOrderProcessor [EQUIVALENT, 7 ms] 8.71/3.28 (34) YES 8.71/3.28 (35) JBCTerminationSCC 8.71/3.28 (36) SCCToIRSProof [SOUND, 14 ms] 8.71/3.28 (37) IRSwT 8.71/3.28 (38) IRSFormatTransformerProof [EQUIVALENT, 0 ms] 8.71/3.28 (39) IRSwT 8.71/3.28 (40) IRSwTTerminationDigraphProof [EQUIVALENT, 11 ms] 8.71/3.28 (41) IRSwT 8.71/3.28 (42) IntTRSCompressionProof [EQUIVALENT, 0 ms] 8.71/3.28 (43) IRSwT 8.71/3.28 (44) TempFilterProof [SOUND, 12 ms] 8.71/3.28 (45) IntTRS 8.71/3.28 (46) PolynomialOrderProcessor [EQUIVALENT, 0 ms] 8.71/3.28 (47) YES 8.71/3.28 8.71/3.28 8.71/3.28 ---------------------------------------- 8.71/3.28 8.71/3.28 (0) 8.71/3.28 Obligation: 8.71/3.28 need to prove termination of the following program: 8.71/3.28 public class ListReverseCyclicList { 8.71/3.28 public static void main(String... args) { 8.71/3.28 List x = List.createCycle(args[0].length()); 8.71/3.28 List.reverse(x); 8.71/3.28 } 8.71/3.28 } 8.71/3.28 8.71/3.28 class List { 8.71/3.28 List n; 8.71/3.28 8.71/3.28 public List(List next) { 8.71/3.28 this.n = next; 8.71/3.28 } 8.71/3.28 8.71/3.28 public static void reverse(List x) { 8.71/3.28 List y = null; 8.71/3.28 while (x != null) { 8.71/3.28 List z = x; 8.71/3.28 x = x.n; 8.71/3.28 z.n = y; 8.71/3.28 y = z; 8.71/3.28 } 8.71/3.28 } 8.71/3.28 8.71/3.28 public static List createList(int l, List end) { 8.71/3.28 while (--l > 0) { 8.71/3.28 end = new List(end); 8.71/3.28 } 8.71/3.28 return end; 8.71/3.28 } 8.71/3.28 8.71/3.28 public static List createCycle(int l) { 8.71/3.28 List last = new List(null); 8.71/3.28 List first = createList(l - 1, last); 8.71/3.28 last.n = first; 8.71/3.28 return first; 8.71/3.28 } 8.71/3.28 popout

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all output return to Java_Bytecode 2019-04-01 06.50