details

property	value
status	complete
benchmark	#3.5b.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n174.star.cs.uiowa.edu
space	AG01

run statistics

property	value
solver	muterm 6.0.3
configuration	default
runtime (wallclock)	0.0560301 seconds
cpu usage	0.050246
user time	0.028277
system time	0.021969
max virtual memory	113188.0
max residence set size	5892.0

stage attributes

key	value
starexec-result	YES

output

YES Problem 1: (VAR v_NonEmpty:S x:S y:S) (RULES if_minus(ffalse,s(x:S),y:S) -> s(minus(x:S,y:S)) if_minus(ttrue,s(x:S),y:S) -> 0 if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue le(s(x:S),0) -> ffalse le(s(x:S),s(y:S)) -> le(x:S,y:S) minus(0,y:S) -> 0 minus(s(x:S),y:S) -> if_minus(le(s(x:S),y:S),s(x:S),y:S) mod(0,y:S) -> 0 mod(s(x:S),0) -> 0 mod(s(x:S),s(y:S)) -> if_mod(le(y:S,x:S),s(x:S),s(y:S)) ) Problem 1: Innermost Equivalent Processor: -> Rules: if_minus(ffalse,s(x:S),y:S) -> s(minus(x:S,y:S)) if_minus(ttrue,s(x:S),y:S) -> 0 if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue le(s(x:S),0) -> ffalse le(s(x:S),s(y:S)) -> le(x:S,y:S) minus(0,y:S) -> 0 minus(s(x:S),y:S) -> if_minus(le(s(x:S),y:S),s(x:S),y:S) mod(0,y:S) -> 0 mod(s(x:S),0) -> 0 mod(s(x:S),s(y:S)) -> if_mod(le(y:S,x:S),s(x:S),s(y:S)) -> The term rewriting system is non-overlaping or locally confluent overlay system. Therefore, innermost termination implies termination. Problem 1: Dependency Pairs Processor: -> Pairs: IF_MINUS(ffalse,s(x:S),y:S) -> MINUS(x:S,y:S) IF_MOD(ttrue,s(x:S),s(y:S)) -> MINUS(x:S,y:S) IF_MOD(ttrue,s(x:S),s(y:S)) -> MOD(minus(x:S,y:S),s(y:S)) LE(s(x:S),s(y:S)) -> LE(x:S,y:S) MINUS(s(x:S),y:S) -> IF_MINUS(le(s(x:S),y:S),s(x:S),y:S) MINUS(s(x:S),y:S) -> LE(s(x:S),y:S) MOD(s(x:S),s(y:S)) -> IF_MOD(le(y:S,x:S),s(x:S),s(y:S)) MOD(s(x:S),s(y:S)) -> LE(y:S,x:S) -> Rules: if_minus(ffalse,s(x:S),y:S) -> s(minus(x:S,y:S)) if_minus(ttrue,s(x:S),y:S) -> 0 if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue le(s(x:S),0) -> ffalse le(s(x:S),s(y:S)) -> le(x:S,y:S) minus(0,y:S) -> 0 minus(s(x:S),y:S) -> if_minus(le(s(x:S),y:S),s(x:S),y:S) mod(0,y:S) -> 0 mod(s(x:S),0) -> 0 mod(s(x:S),s(y:S)) -> if_mod(le(y:S,x:S),s(x:S),s(y:S)) Problem 1: SCC Processor: -> Pairs: IF_MINUS(ffalse,s(x:S),y:S) -> MINUS(x:S,y:S) IF_MOD(ttrue,s(x:S),s(y:S)) -> MINUS(x:S,y:S) IF_MOD(ttrue,s(x:S),s(y:S)) -> MOD(minus(x:S,y:S),s(y:S)) LE(s(x:S),s(y:S)) -> LE(x:S,y:S) MINUS(s(x:S),y:S) -> IF_MINUS(le(s(x:S),y:S),s(x:S),y:S) MINUS(s(x:S),y:S) -> LE(s(x:S),y:S) MOD(s(x:S),s(y:S)) -> IF_MOD(le(y:S,x:S),s(x:S),s(y:S)) MOD(s(x:S),s(y:S)) -> LE(y:S,x:S) -> Rules: if_minus(ffalse,s(x:S),y:S) -> s(minus(x:S,y:S)) if_minus(ttrue,s(x:S),y:S) -> 0 if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue le(s(x:S),0) -> ffalse le(s(x:S),s(y:S)) -> le(x:S,y:S) minus(0,y:S) -> 0 minus(s(x:S),y:S) -> if_minus(le(s(x:S),y:S),s(x:S),y:S) mod(0,y:S) -> 0 mod(s(x:S),0) -> 0 mod(s(x:S),s(y:S)) -> if_mod(le(y:S,x:S),s(x:S),s(y:S)) ->Strongly Connected Components: ->->Cycle: ->->-> Pairs: LE(s(x:S),s(y:S)) -> LE(x:S,y:S) ->->-> Rules: if_minus(ffalse,s(x:S),y:S) -> s(minus(x:S,y:S)) if_minus(ttrue,s(x:S),y:S) -> 0 if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue popout

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all output return to TRS Standard