details

property	value
status	complete
benchmark	div_hard.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n074.star.cs.uiowa.edu
space	Mixed_TRS

run statistics

property	value
solver	NaTT v.1.6c
configuration	Default
runtime (wallclock)	0.191645 seconds
cpu usage	0.052155
user time	0.022125
system time	0.03003
max virtual memory	113188.0
max residence set size	6352.0

stage attributes

key	value
starexec-result	MAYBE

output

MAYBE Input TRS: 1: double(x) -> plus(x,x) 2: double(0()) -> 0() 3: double(s(x)) -> s(s(double(x))) 4: plus(0(),y) -> y 5: plus(s(x),y) -> s(plus(x,y)) 6: minus(s(x),s(y)) -> minus(x,y) 7: minus(0(),x) -> 0() 8: minus(x,0()) -> x 9: div(s(x),s(y)) -> s(div(minus(s(x),double(s(y))),s(y))) 10: div(0(),s(y)) -> 0() Number of strict rules: 10 Direct POLO(bPol) ... failed. Uncurrying ... failed. Dependency Pairs: #1: #minus(s(x),s(y)) -> #minus(x,y) #2: #div(s(x),s(y)) -> #div(minus(s(x),double(s(y))),s(y)) #3: #div(s(x),s(y)) -> #minus(s(x),double(s(y))) #4: #div(s(x),s(y)) -> #double(s(y)) #5: #plus(s(x),y) -> #plus(x,y) #6: #double(s(x)) -> #double(x) #7: #double(x) -> #plus(x,x) Number of SCCs: 4, DPs: 4 SCC { #6 } POLO(Sum)... succeeded. #div w: 0 s w: x1 + 1 minus w: 0 #plus w: 0 div w: 0 0 w: 0 #double w: x1 double w: 0 #minus w: 0 plus w: 0 USABLE RULES: { } Removed DPs: #6 Number of SCCs: 3, DPs: 3 SCC { #5 } POLO(Sum)... succeeded. #div w: 0 s w: x1 + 1 minus w: 0 #plus w: x1 div w: 0 0 w: 0 #double w: 0 double w: 0 #minus w: 0 plus w: 0 USABLE RULES: { } Removed DPs: #5 Number of SCCs: 2, DPs: 2 SCC { #1 } POLO(Sum)... succeeded. #div w: 0 s w: x1 + 1 minus w: 0 #plus w: 0 div w: 0 0 w: 0 #double w: 0 double w: 0 #minus w: x2 plus w: 0 USABLE RULES: { } Removed DPs: #1 Number of SCCs: 1, DPs: 1 SCC { #2 } POLO(Sum)... POLO(max)... QLPOS... POLO(mSum)... QWPOpS(mSum)... Mat2b... failed. Finding a loop... failed. popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to TRS Standard