details

property	value
status	complete
benchmark	ExConc_Zan97_FR.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n180.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	1.7416 seconds
cpu usage	3.71067
user time	3.54088
system time	0.16979
max virtual memory	1.8477072E7
max residence set size	255060.0

stage attributes

key	value
starexec-result	YES

output

YES proof of /export/starexec/sandbox2/benchmark/theBenchmark.xml # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) RFCMatchBoundsTRSProof [EQUIVALENT, 0 ms] (2) YES ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: f(X) -> g(n__h(n__f(X))) h(X) -> n__h(X) f(X) -> n__f(X) activate(n__h(X)) -> h(activate(X)) activate(n__f(X)) -> f(activate(X)) activate(X) -> X Q is empty. ---------------------------------------- (1) RFCMatchBoundsTRSProof (EQUIVALENT) Termination of the TRS R could be shown with a Match Bound [MATCHBOUNDS1,MATCHBOUNDS2] of 2. This implies Q-termination of R. The following rules were used to construct the certificate: f(X) -> g(n__h(n__f(X))) h(X) -> n__h(X) f(X) -> n__f(X) activate(n__h(X)) -> h(activate(X)) activate(n__f(X)) -> f(activate(X)) activate(X) -> X The certificate found is represented by the following graph. The certificate consists of the following enumerated nodes: 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 Node 1 is start node and node 2 is final node. Those nodes are connected through the following edges: * 1 to 3 labelled g_1(0)* 1 to 2 labelled n__h_1(0), n__f_1(0), f_1(0), g_1(0), h_1(0), activate_1(0), n__f_1(1), n__h_1(1), f_1(1), g_1(1), h_1(1), activate_1(1), n__f_1(2), n__h_1(2)* 1 to 5 labelled h_1(0), f_1(0), n__h_1(1), n__f_1(1)* 1 to 6 labelled g_1(1)* 1 to 8 labelled h_1(1), f_1(1), n__h_1(2), n__f_1(2)* 1 to 9 labelled g_1(2)* 1 to 1 labelled h_1(1), f_1(1), n__h_1(2), n__f_1(2)* 2 to 2 labelled #_1(0)* 3 to 4 labelled n__h_1(0)* 4 to 2 labelled n__f_1(0)* 5 to 2 labelled activate_1(0), f_1(1), g_1(1), n__h_1(1), n__f_1(1), h_1(1), activate_1(1), n__f_1(2), n__h_1(2)* 5 to 1 labelled h_1(1), f_1(1), n__h_1(2), n__f_1(2)* 5 to 9 labelled g_1(2)* 6 to 7 labelled n__h_1(1)* 7 to 2 labelled n__f_1(1)* 7 to 5 labelled n__f_1(1)* 8 to 2 labelled activate_1(1), f_1(1), g_1(1), n__h_1(1), n__f_1(1), h_1(1), n__f_1(2), n__h_1(2)* 8 to 1 labelled h_1(1), f_1(1), n__h_1(2), n__f_1(2)* 8 to 5 labelled g_1(2)* 8 to 9 labelled g_1(2)* 9 to 10 labelled n__h_1(2)* 10 to 2 labelled n__f_1(2)* 10 to 8 labelled n__f_1(2)* 10 to 1 labelled n__f_1(2) ---------------------------------------- (2) YES popout

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