details

property	value
status	complete
benchmark	Ex2_Luc03b_FR.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n177.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	muterm 6.0.3
configuration	default
runtime (wallclock)	1.37481 seconds
cpu usage	0.500722
user time	0.345623
system time	0.155099
max virtual memory	814020.0
max residence set size	9992.0

stage attributes

key	value
starexec-result	YES

output

YES Problem 1: (VAR v_NonEmpty:S X:S X1:S X2:S Y:S Z:S) (RULES activate(n__add(X1:S,X2:S)) -> add(activate(X1:S),activate(X2:S)) activate(n__from(X:S)) -> from(activate(X:S)) activate(n__fst(X1:S,X2:S)) -> fst(activate(X1:S),activate(X2:S)) activate(n__len(X:S)) -> len(activate(X:S)) activate(n__s(X:S)) -> s(X:S) activate(X:S) -> X:S add(s(X:S),Y:S) -> s(n__add(activate(X:S),Y:S)) add(0,X:S) -> X:S add(X1:S,X2:S) -> n__add(X1:S,X2:S) from(X:S) -> cons(X:S,n__from(n__s(X:S))) from(X:S) -> n__from(X:S) fst(s(X:S),cons(Y:S,Z:S)) -> cons(Y:S,n__fst(activate(X:S),activate(Z:S))) fst(0,Z:S) -> nil fst(X1:S,X2:S) -> n__fst(X1:S,X2:S) len(cons(X:S,Z:S)) -> s(n__len(activate(Z:S))) len(nil) -> 0 len(X:S) -> n__len(X:S) s(X:S) -> n__s(X:S) ) Problem 1: Dependency Pairs Processor: -> Pairs: ACTIVATE(n__add(X1:S,X2:S)) -> ACTIVATE(X1:S) ACTIVATE(n__add(X1:S,X2:S)) -> ACTIVATE(X2:S) ACTIVATE(n__add(X1:S,X2:S)) -> ADD(activate(X1:S),activate(X2:S)) ACTIVATE(n__from(X:S)) -> ACTIVATE(X:S) ACTIVATE(n__from(X:S)) -> FROM(activate(X:S)) ACTIVATE(n__fst(X1:S,X2:S)) -> ACTIVATE(X1:S) ACTIVATE(n__fst(X1:S,X2:S)) -> ACTIVATE(X2:S) ACTIVATE(n__fst(X1:S,X2:S)) -> FST(activate(X1:S),activate(X2:S)) ACTIVATE(n__len(X:S)) -> ACTIVATE(X:S) ACTIVATE(n__len(X:S)) -> LEN(activate(X:S)) ACTIVATE(n__s(X:S)) -> S(X:S) ADD(s(X:S),Y:S) -> ACTIVATE(X:S) ADD(s(X:S),Y:S) -> S(n__add(activate(X:S),Y:S)) FST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(X:S) FST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(Z:S) LEN(cons(X:S,Z:S)) -> ACTIVATE(Z:S) LEN(cons(X:S,Z:S)) -> S(n__len(activate(Z:S))) -> Rules: activate(n__add(X1:S,X2:S)) -> add(activate(X1:S),activate(X2:S)) activate(n__from(X:S)) -> from(activate(X:S)) activate(n__fst(X1:S,X2:S)) -> fst(activate(X1:S),activate(X2:S)) activate(n__len(X:S)) -> len(activate(X:S)) activate(n__s(X:S)) -> s(X:S) activate(X:S) -> X:S add(s(X:S),Y:S) -> s(n__add(activate(X:S),Y:S)) add(0,X:S) -> X:S add(X1:S,X2:S) -> n__add(X1:S,X2:S) from(X:S) -> cons(X:S,n__from(n__s(X:S))) from(X:S) -> n__from(X:S) fst(s(X:S),cons(Y:S,Z:S)) -> cons(Y:S,n__fst(activate(X:S),activate(Z:S))) fst(0,Z:S) -> nil fst(X1:S,X2:S) -> n__fst(X1:S,X2:S) len(cons(X:S,Z:S)) -> s(n__len(activate(Z:S))) len(nil) -> 0 len(X:S) -> n__len(X:S) s(X:S) -> n__s(X:S) Problem 1: SCC Processor: -> Pairs: ACTIVATE(n__add(X1:S,X2:S)) -> ACTIVATE(X1:S) ACTIVATE(n__add(X1:S,X2:S)) -> ACTIVATE(X2:S) ACTIVATE(n__add(X1:S,X2:S)) -> ADD(activate(X1:S),activate(X2:S)) ACTIVATE(n__from(X:S)) -> ACTIVATE(X:S) ACTIVATE(n__from(X:S)) -> FROM(activate(X:S)) ACTIVATE(n__fst(X1:S,X2:S)) -> ACTIVATE(X1:S) ACTIVATE(n__fst(X1:S,X2:S)) -> ACTIVATE(X2:S) ACTIVATE(n__fst(X1:S,X2:S)) -> FST(activate(X1:S),activate(X2:S)) ACTIVATE(n__len(X:S)) -> ACTIVATE(X:S) ACTIVATE(n__len(X:S)) -> LEN(activate(X:S)) ACTIVATE(n__s(X:S)) -> S(X:S) ADD(s(X:S),Y:S) -> ACTIVATE(X:S) ADD(s(X:S),Y:S) -> S(n__add(activate(X:S),Y:S)) FST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(X:S) FST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(Z:S) LEN(cons(X:S,Z:S)) -> ACTIVATE(Z:S) LEN(cons(X:S,Z:S)) -> S(n__len(activate(Z:S))) -> Rules: activate(n__add(X1:S,X2:S)) -> add(activate(X1:S),activate(X2:S)) activate(n__from(X:S)) -> from(activate(X:S)) activate(n__fst(X1:S,X2:S)) -> fst(activate(X1:S),activate(X2:S)) activate(n__len(X:S)) -> len(activate(X:S)) activate(n__s(X:S)) -> s(X:S) activate(X:S) -> X:S add(s(X:S),Y:S) -> s(n__add(activate(X:S),Y:S)) add(0,X:S) -> X:S add(X1:S,X2:S) -> n__add(X1:S,X2:S) from(X:S) -> cons(X:S,n__from(n__s(X:S))) from(X:S) -> n__from(X:S) popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to TRS Standard