details

property	value
status	complete
benchmark	PEANO_complete-noand_Z.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n180.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	ttt2-1.20
configuration	ttt2
runtime (wallclock)	16.6624 seconds
cpu usage	63.1435
user time	59.3659
system time	3.77756
max virtual memory	6587644.0
max residence set size	165532.0

stage attributes

key	value
starexec-result	YES

output

YES Problem: U11(tt(),V1,V2) -> U12(isNatKind(activate(V1)),activate(V1),activate(V2)) U12(tt(),V1,V2) -> U13(isNatKind(activate(V2)),activate(V1),activate(V2)) U13(tt(),V1,V2) -> U14(isNatKind(activate(V2)),activate(V1),activate(V2)) U14(tt(),V1,V2) -> U15(isNat(activate(V1)),activate(V2)) U15(tt(),V2) -> U16(isNat(activate(V2))) U16(tt()) -> tt() U21(tt(),V1) -> U22(isNatKind(activate(V1)),activate(V1)) U22(tt(),V1) -> U23(isNat(activate(V1))) U23(tt()) -> tt() U31(tt(),V2) -> U32(isNatKind(activate(V2))) U32(tt()) -> tt() U41(tt()) -> tt() U51(tt(),N) -> U52(isNatKind(activate(N)),activate(N)) U52(tt(),N) -> activate(N) U61(tt(),M,N) -> U62(isNatKind(activate(M)),activate(M),activate(N)) U62(tt(),M,N) -> U63(isNat(activate(N)),activate(M),activate(N)) U63(tt(),M,N) -> U64(isNatKind(activate(N)),activate(M),activate(N)) U64(tt(),M,N) -> s(plus(activate(N),activate(M))) isNat(n__0()) -> tt() isNat(n__plus(V1,V2)) -> U11(isNatKind(activate(V1)),activate(V1),activate(V2)) isNat(n__s(V1)) -> U21(isNatKind(activate(V1)),activate(V1)) isNatKind(n__0()) -> tt() isNatKind(n__plus(V1,V2)) -> U31(isNatKind(activate(V1)),activate(V2)) isNatKind(n__s(V1)) -> U41(isNatKind(activate(V1))) plus(N,0()) -> U51(isNat(N),N) plus(N,s(M)) -> U61(isNat(M),M,N) 0() -> n__0() plus(X1,X2) -> n__plus(X1,X2) s(X) -> n__s(X) activate(n__0()) -> 0() activate(n__plus(X1,X2)) -> plus(X1,X2) activate(n__s(X)) -> s(X) activate(X) -> X Proof: DP Processor: DPs: U11#(tt(),V1,V2) -> activate#(V2) U11#(tt(),V1,V2) -> activate#(V1) U11#(tt(),V1,V2) -> isNatKind#(activate(V1)) U11#(tt(),V1,V2) -> U12#(isNatKind(activate(V1)),activate(V1),activate(V2)) U12#(tt(),V1,V2) -> activate#(V1) U12#(tt(),V1,V2) -> activate#(V2) U12#(tt(),V1,V2) -> isNatKind#(activate(V2)) U12#(tt(),V1,V2) -> U13#(isNatKind(activate(V2)),activate(V1),activate(V2)) U13#(tt(),V1,V2) -> activate#(V1) U13#(tt(),V1,V2) -> activate#(V2) U13#(tt(),V1,V2) -> isNatKind#(activate(V2)) U13#(tt(),V1,V2) -> U14#(isNatKind(activate(V2)),activate(V1),activate(V2)) U14#(tt(),V1,V2) -> activate#(V2) U14#(tt(),V1,V2) -> activate#(V1) U14#(tt(),V1,V2) -> isNat#(activate(V1)) U14#(tt(),V1,V2) -> U15#(isNat(activate(V1)),activate(V2)) U15#(tt(),V2) -> activate#(V2) U15#(tt(),V2) -> isNat#(activate(V2)) U15#(tt(),V2) -> U16#(isNat(activate(V2))) U21#(tt(),V1) -> activate#(V1) U21#(tt(),V1) -> isNatKind#(activate(V1)) U21#(tt(),V1) -> U22#(isNatKind(activate(V1)),activate(V1)) U22#(tt(),V1) -> activate#(V1) U22#(tt(),V1) -> isNat#(activate(V1)) U22#(tt(),V1) -> U23#(isNat(activate(V1))) U31#(tt(),V2) -> activate#(V2) U31#(tt(),V2) -> isNatKind#(activate(V2)) U31#(tt(),V2) -> U32#(isNatKind(activate(V2))) U51#(tt(),N) -> activate#(N) U51#(tt(),N) -> isNatKind#(activate(N)) U51#(tt(),N) -> U52#(isNatKind(activate(N)),activate(N)) U52#(tt(),N) -> activate#(N) U61#(tt(),M,N) -> activate#(N) U61#(tt(),M,N) -> activate#(M) U61#(tt(),M,N) -> isNatKind#(activate(M)) U61#(tt(),M,N) -> U62#(isNatKind(activate(M)),activate(M),activate(N)) U62#(tt(),M,N) -> activate#(M) U62#(tt(),M,N) -> activate#(N) U62#(tt(),M,N) -> isNat#(activate(N)) U62#(tt(),M,N) -> U63#(isNat(activate(N)),activate(M),activate(N)) U63#(tt(),M,N) -> activate#(M) U63#(tt(),M,N) -> activate#(N) U63#(tt(),M,N) -> isNatKind#(activate(N)) U63#(tt(),M,N) -> U64#(isNatKind(activate(N)),activate(M),activate(N)) U64#(tt(),M,N) -> activate#(M) U64#(tt(),M,N) -> activate#(N) U64#(tt(),M,N) -> plus#(activate(N),activate(M)) U64#(tt(),M,N) -> s#(plus(activate(N),activate(M))) isNat#(n__plus(V1,V2)) -> activate#(V2) isNat#(n__plus(V1,V2)) -> activate#(V1) isNat#(n__plus(V1,V2)) -> isNatKind#(activate(V1)) isNat#(n__plus(V1,V2)) -> U11#(isNatKind(activate(V1)),activate(V1),activate(V2)) isNat#(n__s(V1)) -> activate#(V1) isNat#(n__s(V1)) -> isNatKind#(activate(V1)) isNat#(n__s(V1)) -> U21#(isNatKind(activate(V1)),activate(V1)) isNatKind#(n__plus(V1,V2)) -> activate#(V2) isNatKind#(n__plus(V1,V2)) -> activate#(V1) isNatKind#(n__plus(V1,V2)) -> isNatKind#(activate(V1)) isNatKind#(n__plus(V1,V2)) -> U31#(isNatKind(activate(V1)),activate(V2)) isNatKind#(n__s(V1)) -> activate#(V1) popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to TRS Standard