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TRS Standard pair #487069984
details
property
value
status
complete
benchmark
PEANO_complete-noand_Z.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n074.star.cs.uiowa.edu
space
Transformed_CSR_04
run statistics
property
value
solver
muterm 6.0.3
configuration
default
runtime (wallclock)
3.3823 seconds
cpu usage
3.40778
user time
3.05515
system time
0.352632
max virtual memory
713144.0
max residence set size
19436.0
stage attributes
key
value
starexec-result
YES
output
YES Problem 1: (VAR v_NonEmpty:S M:S N:S V1:S V2:S X:S X1:S X2:S) (RULES 0 -> n__0 U11(tt,V1:S,V2:S) -> U12(isNatKind(activate(V1:S)),activate(V1:S),activate(V2:S)) U12(tt,V1:S,V2:S) -> U13(isNatKind(activate(V2:S)),activate(V1:S),activate(V2:S)) U13(tt,V1:S,V2:S) -> U14(isNatKind(activate(V2:S)),activate(V1:S),activate(V2:S)) U14(tt,V1:S,V2:S) -> U15(isNat(activate(V1:S)),activate(V2:S)) U15(tt,V2:S) -> U16(isNat(activate(V2:S))) U16(tt) -> tt U21(tt,V1:S) -> U22(isNatKind(activate(V1:S)),activate(V1:S)) U22(tt,V1:S) -> U23(isNat(activate(V1:S))) U23(tt) -> tt U31(tt,V2:S) -> U32(isNatKind(activate(V2:S))) U32(tt) -> tt U41(tt) -> tt U51(tt,N:S) -> U52(isNatKind(activate(N:S)),activate(N:S)) U52(tt,N:S) -> activate(N:S) U61(tt,M:S,N:S) -> U62(isNatKind(activate(M:S)),activate(M:S),activate(N:S)) U62(tt,M:S,N:S) -> U63(isNat(activate(N:S)),activate(M:S),activate(N:S)) U63(tt,M:S,N:S) -> U64(isNatKind(activate(N:S)),activate(M:S),activate(N:S)) U64(tt,M:S,N:S) -> s(plus(activate(N:S),activate(M:S))) activate(n__0) -> 0 activate(n__plus(X1:S,X2:S)) -> plus(X1:S,X2:S) activate(n__s(X:S)) -> s(X:S) activate(X:S) -> X:S isNat(n__0) -> tt isNat(n__plus(V1:S,V2:S)) -> U11(isNatKind(activate(V1:S)),activate(V1:S),activate(V2:S)) isNat(n__s(V1:S)) -> U21(isNatKind(activate(V1:S)),activate(V1:S)) isNatKind(n__0) -> tt isNatKind(n__plus(V1:S,V2:S)) -> U31(isNatKind(activate(V1:S)),activate(V2:S)) isNatKind(n__s(V1:S)) -> U41(isNatKind(activate(V1:S))) plus(N:S,0) -> U51(isNat(N:S),N:S) plus(N:S,s(M:S)) -> U61(isNat(M:S),M:S,N:S) plus(X1:S,X2:S) -> n__plus(X1:S,X2:S) s(X:S) -> n__s(X:S) ) Problem 1: Dependency Pairs Processor: -> Pairs: U11#(tt,V1:S,V2:S) -> U12#(isNatKind(activate(V1:S)),activate(V1:S),activate(V2:S)) U11#(tt,V1:S,V2:S) -> ACTIVATE(V1:S) U11#(tt,V1:S,V2:S) -> ACTIVATE(V2:S) U11#(tt,V1:S,V2:S) -> ISNATKIND(activate(V1:S)) U12#(tt,V1:S,V2:S) -> U13#(isNatKind(activate(V2:S)),activate(V1:S),activate(V2:S)) U12#(tt,V1:S,V2:S) -> ACTIVATE(V1:S) U12#(tt,V1:S,V2:S) -> ACTIVATE(V2:S) U12#(tt,V1:S,V2:S) -> ISNATKIND(activate(V2:S)) U13#(tt,V1:S,V2:S) -> U14#(isNatKind(activate(V2:S)),activate(V1:S),activate(V2:S)) U13#(tt,V1:S,V2:S) -> ACTIVATE(V1:S) U13#(tt,V1:S,V2:S) -> ACTIVATE(V2:S) U13#(tt,V1:S,V2:S) -> ISNATKIND(activate(V2:S)) U14#(tt,V1:S,V2:S) -> U15#(isNat(activate(V1:S)),activate(V2:S)) U14#(tt,V1:S,V2:S) -> ACTIVATE(V1:S) U14#(tt,V1:S,V2:S) -> ACTIVATE(V2:S) U14#(tt,V1:S,V2:S) -> ISNAT(activate(V1:S)) U15#(tt,V2:S) -> U16#(isNat(activate(V2:S))) U15#(tt,V2:S) -> ACTIVATE(V2:S) U15#(tt,V2:S) -> ISNAT(activate(V2:S)) U21#(tt,V1:S) -> U22#(isNatKind(activate(V1:S)),activate(V1:S)) U21#(tt,V1:S) -> ACTIVATE(V1:S) U21#(tt,V1:S) -> ISNATKIND(activate(V1:S)) U22#(tt,V1:S) -> U23#(isNat(activate(V1:S))) U22#(tt,V1:S) -> ACTIVATE(V1:S) U22#(tt,V1:S) -> ISNAT(activate(V1:S)) U31#(tt,V2:S) -> U32#(isNatKind(activate(V2:S))) U31#(tt,V2:S) -> ACTIVATE(V2:S) U31#(tt,V2:S) -> ISNATKIND(activate(V2:S)) U51#(tt,N:S) -> U52#(isNatKind(activate(N:S)),activate(N:S)) U51#(tt,N:S) -> ACTIVATE(N:S) U51#(tt,N:S) -> ISNATKIND(activate(N:S)) U52#(tt,N:S) -> ACTIVATE(N:S) U61#(tt,M:S,N:S) -> U62#(isNatKind(activate(M:S)),activate(M:S),activate(N:S)) U61#(tt,M:S,N:S) -> ACTIVATE(M:S) U61#(tt,M:S,N:S) -> ACTIVATE(N:S) U61#(tt,M:S,N:S) -> ISNATKIND(activate(M:S)) U62#(tt,M:S,N:S) -> U63#(isNat(activate(N:S)),activate(M:S),activate(N:S)) U62#(tt,M:S,N:S) -> ACTIVATE(M:S) U62#(tt,M:S,N:S) -> ACTIVATE(N:S) U62#(tt,M:S,N:S) -> ISNAT(activate(N:S)) U63#(tt,M:S,N:S) -> U64#(isNatKind(activate(N:S)),activate(M:S),activate(N:S)) U63#(tt,M:S,N:S) -> ACTIVATE(M:S) U63#(tt,M:S,N:S) -> ACTIVATE(N:S) U63#(tt,M:S,N:S) -> ISNATKIND(activate(N:S)) U64#(tt,M:S,N:S) -> ACTIVATE(M:S) U64#(tt,M:S,N:S) -> ACTIVATE(N:S) U64#(tt,M:S,N:S) -> PLUS(activate(N:S),activate(M:S)) U64#(tt,M:S,N:S) -> S(plus(activate(N:S),activate(M:S))) ACTIVATE(n__0) -> 0# ACTIVATE(n__plus(X1:S,X2:S)) -> PLUS(X1:S,X2:S) ACTIVATE(n__s(X:S)) -> S(X:S) ISNAT(n__plus(V1:S,V2:S)) -> U11#(isNatKind(activate(V1:S)),activate(V1:S),activate(V2:S)) ISNAT(n__plus(V1:S,V2:S)) -> ACTIVATE(V1:S) ISNAT(n__plus(V1:S,V2:S)) -> ACTIVATE(V2:S) ISNAT(n__plus(V1:S,V2:S)) -> ISNATKIND(activate(V1:S))
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