details

property	value
status	complete
benchmark	Ex15_Luc98_FR.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n181.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	muterm 6.0.3
configuration	default
runtime (wallclock)	2.23001 seconds
cpu usage	1.81388
user time	1.2403
system time	0.573578
max virtual memory	707372.0
max residence set size	9348.0

stage attributes

key	value
starexec-result	YES

output

YES Problem 1: (VAR v_NonEmpty:S X:S X1:S X2:S Y:S Z:S) (RULES activate(n__add(X1:S,X2:S)) -> add(activate(X1:S),X2:S) activate(n__first(X1:S,X2:S)) -> first(activate(X1:S),activate(X2:S)) activate(n__from(X:S)) -> from(X:S) activate(n__s(X:S)) -> s(X:S) activate(X:S) -> X:S add(s(X:S),Y:S) -> s(n__add(activate(X:S),activate(Y:S))) add(0,X:S) -> activate(X:S) add(X1:S,X2:S) -> n__add(X1:S,X2:S) and(ffalse,Y:S) -> ffalse and(ttrue,X:S) -> activate(X:S) first(s(X:S),cons(Y:S,Z:S)) -> cons(activate(Y:S),n__first(activate(X:S),activate(Z:S))) first(0,X:S) -> nil first(X1:S,X2:S) -> n__first(X1:S,X2:S) from(X:S) -> cons(activate(X:S),n__from(n__s(activate(X:S)))) from(X:S) -> n__from(X:S) if(ffalse,X:S,Y:S) -> activate(Y:S) if(ttrue,X:S,Y:S) -> activate(X:S) s(X:S) -> n__s(X:S) ) Problem 1: Dependency Pairs Processor: -> Pairs: ACTIVATE(n__add(X1:S,X2:S)) -> ACTIVATE(X1:S) ACTIVATE(n__add(X1:S,X2:S)) -> ADD(activate(X1:S),X2:S) ACTIVATE(n__first(X1:S,X2:S)) -> ACTIVATE(X1:S) ACTIVATE(n__first(X1:S,X2:S)) -> ACTIVATE(X2:S) ACTIVATE(n__first(X1:S,X2:S)) -> FIRST(activate(X1:S),activate(X2:S)) ACTIVATE(n__from(X:S)) -> FROM(X:S) ACTIVATE(n__s(X:S)) -> S(X:S) ADD(s(X:S),Y:S) -> ACTIVATE(X:S) ADD(s(X:S),Y:S) -> ACTIVATE(Y:S) ADD(s(X:S),Y:S) -> S(n__add(activate(X:S),activate(Y:S))) ADD(0,X:S) -> ACTIVATE(X:S) AND(ttrue,X:S) -> ACTIVATE(X:S) FIRST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(X:S) FIRST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(Y:S) FIRST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(Z:S) FROM(X:S) -> ACTIVATE(X:S) IF(ffalse,X:S,Y:S) -> ACTIVATE(Y:S) IF(ttrue,X:S,Y:S) -> ACTIVATE(X:S) -> Rules: activate(n__add(X1:S,X2:S)) -> add(activate(X1:S),X2:S) activate(n__first(X1:S,X2:S)) -> first(activate(X1:S),activate(X2:S)) activate(n__from(X:S)) -> from(X:S) activate(n__s(X:S)) -> s(X:S) activate(X:S) -> X:S add(s(X:S),Y:S) -> s(n__add(activate(X:S),activate(Y:S))) add(0,X:S) -> activate(X:S) add(X1:S,X2:S) -> n__add(X1:S,X2:S) and(ffalse,Y:S) -> ffalse and(ttrue,X:S) -> activate(X:S) first(s(X:S),cons(Y:S,Z:S)) -> cons(activate(Y:S),n__first(activate(X:S),activate(Z:S))) first(0,X:S) -> nil first(X1:S,X2:S) -> n__first(X1:S,X2:S) from(X:S) -> cons(activate(X:S),n__from(n__s(activate(X:S)))) from(X:S) -> n__from(X:S) if(ffalse,X:S,Y:S) -> activate(Y:S) if(ttrue,X:S,Y:S) -> activate(X:S) s(X:S) -> n__s(X:S) Problem 1: SCC Processor: -> Pairs: ACTIVATE(n__add(X1:S,X2:S)) -> ACTIVATE(X1:S) ACTIVATE(n__add(X1:S,X2:S)) -> ADD(activate(X1:S),X2:S) ACTIVATE(n__first(X1:S,X2:S)) -> ACTIVATE(X1:S) ACTIVATE(n__first(X1:S,X2:S)) -> ACTIVATE(X2:S) ACTIVATE(n__first(X1:S,X2:S)) -> FIRST(activate(X1:S),activate(X2:S)) ACTIVATE(n__from(X:S)) -> FROM(X:S) ACTIVATE(n__s(X:S)) -> S(X:S) ADD(s(X:S),Y:S) -> ACTIVATE(X:S) ADD(s(X:S),Y:S) -> ACTIVATE(Y:S) ADD(s(X:S),Y:S) -> S(n__add(activate(X:S),activate(Y:S))) ADD(0,X:S) -> ACTIVATE(X:S) AND(ttrue,X:S) -> ACTIVATE(X:S) FIRST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(X:S) FIRST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(Y:S) FIRST(s(X:S),cons(Y:S,Z:S)) -> ACTIVATE(Z:S) FROM(X:S) -> ACTIVATE(X:S) IF(ffalse,X:S,Y:S) -> ACTIVATE(Y:S) IF(ttrue,X:S,Y:S) -> ACTIVATE(X:S) -> Rules: activate(n__add(X1:S,X2:S)) -> add(activate(X1:S),X2:S) activate(n__first(X1:S,X2:S)) -> first(activate(X1:S),activate(X2:S)) activate(n__from(X:S)) -> from(X:S) activate(n__s(X:S)) -> s(X:S) activate(X:S) -> X:S add(s(X:S),Y:S) -> s(n__add(activate(X:S),activate(Y:S))) add(0,X:S) -> activate(X:S) add(X1:S,X2:S) -> n__add(X1:S,X2:S) and(ffalse,Y:S) -> ffalse popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to TRS Standard