details

property	value
status	complete
benchmark	MYNAT_nokinds_noand_GM.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n187.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	ttt2-1.20
configuration	ttt2
runtime (wallclock)	99.3561 seconds
cpu usage	336.328
user time	321.078
system time	15.2506
max virtual memory	6676708.0
max residence set size	490704.0

stage attributes

key	value
starexec-result	MAYBE

output

MAYBE Problem: a__U11(tt(),V2) -> a__U12(a__isNat(V2)) a__U12(tt()) -> tt() a__U21(tt()) -> tt() a__U31(tt(),V2) -> a__U32(a__isNat(V2)) a__U32(tt()) -> tt() a__U41(tt(),N) -> mark(N) a__U51(tt(),M,N) -> a__U52(a__isNat(N),M,N) a__U52(tt(),M,N) -> s(a__plus(mark(N),mark(M))) a__U61(tt()) -> 0() a__U71(tt(),M,N) -> a__U72(a__isNat(N),M,N) a__U72(tt(),M,N) -> a__plus(a__x(mark(N),mark(M)),mark(N)) a__isNat(0()) -> tt() a__isNat(plus(V1,V2)) -> a__U11(a__isNat(V1),V2) a__isNat(s(V1)) -> a__U21(a__isNat(V1)) a__isNat(x(V1,V2)) -> a__U31(a__isNat(V1),V2) a__plus(N,0()) -> a__U41(a__isNat(N),N) a__plus(N,s(M)) -> a__U51(a__isNat(M),M,N) a__x(N,0()) -> a__U61(a__isNat(N)) a__x(N,s(M)) -> a__U71(a__isNat(M),M,N) mark(U11(X1,X2)) -> a__U11(mark(X1),X2) mark(U12(X)) -> a__U12(mark(X)) mark(isNat(X)) -> a__isNat(X) mark(U21(X)) -> a__U21(mark(X)) mark(U31(X1,X2)) -> a__U31(mark(X1),X2) mark(U32(X)) -> a__U32(mark(X)) mark(U41(X1,X2)) -> a__U41(mark(X1),X2) mark(U51(X1,X2,X3)) -> a__U51(mark(X1),X2,X3) mark(U52(X1,X2,X3)) -> a__U52(mark(X1),X2,X3) mark(plus(X1,X2)) -> a__plus(mark(X1),mark(X2)) mark(U61(X)) -> a__U61(mark(X)) mark(U71(X1,X2,X3)) -> a__U71(mark(X1),X2,X3) mark(U72(X1,X2,X3)) -> a__U72(mark(X1),X2,X3) mark(x(X1,X2)) -> a__x(mark(X1),mark(X2)) mark(tt()) -> tt() mark(s(X)) -> s(mark(X)) mark(0()) -> 0() a__U11(X1,X2) -> U11(X1,X2) a__U12(X) -> U12(X) a__isNat(X) -> isNat(X) a__U21(X) -> U21(X) a__U31(X1,X2) -> U31(X1,X2) a__U32(X) -> U32(X) a__U41(X1,X2) -> U41(X1,X2) a__U51(X1,X2,X3) -> U51(X1,X2,X3) a__U52(X1,X2,X3) -> U52(X1,X2,X3) a__plus(X1,X2) -> plus(X1,X2) a__U61(X) -> U61(X) a__U71(X1,X2,X3) -> U71(X1,X2,X3) a__U72(X1,X2,X3) -> U72(X1,X2,X3) a__x(X1,X2) -> x(X1,X2) Proof: Open popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to TRS Standard