TRS Standard pair #487071177

details

property	value
status	complete
benchmark	PEANO_nokinds_noand_iGM.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n071.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	ttt2-1.20
configuration	ttt2
runtime (wallclock)	29.4818 seconds
cpu usage	105.684
user time	97.6347
system time	8.04946
max virtual memory	6670776.0
max residence set size	207332.0

stage attributes

key	value
starexec-result	YES

output

YES

Problem:
 active(U11(tt(),V2)) -> mark(U12(isNat(V2)))
 active(U12(tt())) -> mark(tt())
 active(U21(tt())) -> mark(tt())
 active(U31(tt(),N)) -> mark(N)
 active(U41(tt(),M,N)) -> mark(U42(isNat(N),M,N))
 active(U42(tt(),M,N)) -> mark(s(plus(N,M)))
 active(isNat(0())) -> mark(tt())
 active(isNat(plus(V1,V2))) -> mark(U11(isNat(V1),V2))
 active(isNat(s(V1))) -> mark(U21(isNat(V1)))
 active(plus(N,0())) -> mark(U31(isNat(N),N))
 active(plus(N,s(M))) -> mark(U41(isNat(M),M,N))
 mark(U11(X1,X2)) -> active(U11(mark(X1),X2))
 mark(tt()) -> active(tt())
 mark(U12(X)) -> active(U12(mark(X)))
 mark(isNat(X)) -> active(isNat(X))
 mark(U21(X)) -> active(U21(mark(X)))
 mark(U31(X1,X2)) -> active(U31(mark(X1),X2))
 mark(U41(X1,X2,X3)) -> active(U41(mark(X1),X2,X3))
 mark(U42(X1,X2,X3)) -> active(U42(mark(X1),X2,X3))
 mark(s(X)) -> active(s(mark(X)))
 mark(plus(X1,X2)) -> active(plus(mark(X1),mark(X2)))
 mark(0()) -> active(0())
 U11(mark(X1),X2) -> U11(X1,X2)
 U11(X1,mark(X2)) -> U11(X1,X2)
 U11(active(X1),X2) -> U11(X1,X2)
 U11(X1,active(X2)) -> U11(X1,X2)
 U12(mark(X)) -> U12(X)
 U12(active(X)) -> U12(X)
 isNat(mark(X)) -> isNat(X)
 isNat(active(X)) -> isNat(X)
 U21(mark(X)) -> U21(X)
 U21(active(X)) -> U21(X)
 U31(mark(X1),X2) -> U31(X1,X2)
 U31(X1,mark(X2)) -> U31(X1,X2)
 U31(active(X1),X2) -> U31(X1,X2)
 U31(X1,active(X2)) -> U31(X1,X2)
 U41(mark(X1),X2,X3) -> U41(X1,X2,X3)
 U41(X1,mark(X2),X3) -> U41(X1,X2,X3)
 U41(X1,X2,mark(X3)) -> U41(X1,X2,X3)
 U41(active(X1),X2,X3) -> U41(X1,X2,X3)
 U41(X1,active(X2),X3) -> U41(X1,X2,X3)
 U41(X1,X2,active(X3)) -> U41(X1,X2,X3)
 U42(mark(X1),X2,X3) -> U42(X1,X2,X3)
 U42(X1,mark(X2),X3) -> U42(X1,X2,X3)
 U42(X1,X2,mark(X3)) -> U42(X1,X2,X3)
 U42(active(X1),X2,X3) -> U42(X1,X2,X3)
 U42(X1,active(X2),X3) -> U42(X1,X2,X3)
 U42(X1,X2,active(X3)) -> U42(X1,X2,X3)
 s(mark(X)) -> s(X)
 s(active(X)) -> s(X)
 plus(mark(X1),X2) -> plus(X1,X2)
 plus(X1,mark(X2)) -> plus(X1,X2)
 plus(active(X1),X2) -> plus(X1,X2)
 plus(X1,active(X2)) -> plus(X1,X2)

Proof:
 DP Processor:
  DPs:
   active#(U11(tt(),V2)) -> isNat#(V2)
   active#(U11(tt(),V2)) -> U12#(isNat(V2))
   active#(U11(tt(),V2)) -> mark#(U12(isNat(V2)))
   active#(U12(tt())) -> mark#(tt())
   active#(U21(tt())) -> mark#(tt())
   active#(U31(tt(),N)) -> mark#(N)
   active#(U41(tt(),M,N)) -> isNat#(N)
   active#(U41(tt(),M,N)) -> U42#(isNat(N),M,N)
   active#(U41(tt(),M,N)) -> mark#(U42(isNat(N),M,N))
   active#(U42(tt(),M,N)) -> plus#(N,M)
   active#(U42(tt(),M,N)) -> s#(plus(N,M))
   active#(U42(tt(),M,N)) -> mark#(s(plus(N,M)))
   active#(isNat(0())) -> mark#(tt())
   active#(isNat(plus(V1,V2))) -> isNat#(V1)
   active#(isNat(plus(V1,V2))) -> U11#(isNat(V1),V2)
   active#(isNat(plus(V1,V2))) -> mark#(U11(isNat(V1),V2))
   active#(isNat(s(V1))) -> isNat#(V1)
   active#(isNat(s(V1))) -> U21#(isNat(V1))
   active#(isNat(s(V1))) -> mark#(U21(isNat(V1)))
   active#(plus(N,0())) -> isNat#(N)
   active#(plus(N,0())) -> U31#(isNat(N),N)
   active#(plus(N,0())) -> mark#(U31(isNat(N),N))
   active#(plus(N,s(M))) -> isNat#(M)
   active#(plus(N,s(M))) -> U41#(isNat(M),M,N)
   active#(plus(N,s(M))) -> mark#(U41(isNat(M),M,N))
   mark#(U11(X1,X2)) -> mark#(X1)
   mark#(U11(X1,X2)) -> U11#(mark(X1),X2)
   mark#(U11(X1,X2)) -> active#(U11(mark(X1),X2))
   mark#(tt()) -> active#(tt())
   mark#(U12(X)) -> mark#(X)
   mark#(U12(X)) -> U12#(mark(X))
   mark#(U12(X)) -> active#(U12(mark(X)))
   mark#(isNat(X)) -> active#(isNat(X))
   mark#(U21(X)) -> mark#(X)
   mark#(U21(X)) -> U21#(mark(X))
   mark#(U21(X)) -> active#(U21(mark(X)))
   mark#(U31(X1,X2)) -> mark#(X1)
   mark#(U31(X1,X2)) -> U31#(mark(X1),X2)
   mark#(U31(X1,X2)) -> active#(U31(mark(X1),X2))

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