details

property	value
status	complete
benchmark	PEANO_complete_Z.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n071.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	1.9593 seconds
cpu usage	4.67052
user time	4.48673
system time	0.183788
max virtual memory	1.8352424E7
max residence set size	274772.0

stage attributes

key	value
starexec-result	YES

output

YES proof of /export/starexec/sandbox/benchmark/theBenchmark.xml # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) QTRSRRRProof [EQUIVALENT, 226 ms] (2) QTRS (3) QTRSRRRProof [EQUIVALENT, 0 ms] (4) QTRS (5) RisEmptyProof [EQUIVALENT, 0 ms] (6) YES ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: U11(tt, V1, V2) -> U12(isNat(activate(V1)), activate(V2)) U12(tt, V2) -> U13(isNat(activate(V2))) U13(tt) -> tt U21(tt, V1) -> U22(isNat(activate(V1))) U22(tt) -> tt U31(tt, N) -> activate(N) U41(tt, M, N) -> s(plus(activate(N), activate(M))) and(tt, X) -> activate(X) isNat(n__0) -> tt isNat(n__plus(V1, V2)) -> U11(and(isNatKind(activate(V1)), n__isNatKind(activate(V2))), activate(V1), activate(V2)) isNat(n__s(V1)) -> U21(isNatKind(activate(V1)), activate(V1)) isNatKind(n__0) -> tt isNatKind(n__plus(V1, V2)) -> and(isNatKind(activate(V1)), n__isNatKind(activate(V2))) isNatKind(n__s(V1)) -> isNatKind(activate(V1)) plus(N, 0) -> U31(and(isNat(N), n__isNatKind(N)), N) plus(N, s(M)) -> U41(and(and(isNat(M), n__isNatKind(M)), n__and(isNat(N), n__isNatKind(N))), M, N) 0 -> n__0 plus(X1, X2) -> n__plus(X1, X2) isNatKind(X) -> n__isNatKind(X) s(X) -> n__s(X) and(X1, X2) -> n__and(X1, X2) activate(n__0) -> 0 activate(n__plus(X1, X2)) -> plus(X1, X2) activate(n__isNatKind(X)) -> isNatKind(X) activate(n__s(X)) -> s(X) activate(n__and(X1, X2)) -> and(X1, X2) activate(X) -> X Q is empty. ---------------------------------------- (1) QTRSRRRProof (EQUIVALENT) Used ordering: U11/3(YES,YES,YES) tt/0) U12/2(YES,YES) isNat/1(YES) activate/1)YES( U13/1(YES) U21/2(YES,YES) U22/1(YES) U31/2(YES,YES) U41/3(YES,YES,YES) s/1(YES) plus/2(YES,YES) and/2(YES,YES) n__0/0) n__plus/2(YES,YES) isNatKind/1)YES( n__isNatKind/1)YES( n__s/1(YES) 0/0) n__and/2(YES,YES) Quasi precedence: [U41_3, plus_2, n__plus_2] > U11_3 > [U12_2, isNat_1, U21_2] > U13_1 > tt [U41_3, plus_2, n__plus_2] > U11_3 > [U12_2, isNat_1, U21_2] > U22_1 > tt [U41_3, plus_2, n__plus_2] > U11_3 > [U12_2, isNat_1, U21_2] > [and_2, n__and_2] [U41_3, plus_2, n__plus_2] > U31_2 [U41_3, plus_2, n__plus_2] > [s_1, n__s_1] [n__0, 0] > tt [n__0, 0] > [and_2, n__and_2] Status: U11_3: [1,3,2] tt: multiset status U12_2: multiset status isNat_1: multiset status U13_1: [1] U21_2: multiset status U22_1: [1] U31_2: multiset status U41_3: [3,2,1] s_1: multiset status plus_2: [1,2] popout

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job log

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actions

all output return to TRS Standard