details

property	value
status	complete
benchmark	PALINDROME_complete_Z.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n180.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	muterm 6.0.3
configuration	default
runtime (wallclock)	0.733799 seconds
cpu usage	0.75263
user time	0.613683
system time	0.138947
max virtual memory	710468.0
max residence set size	12772.0

stage attributes

key	value
starexec-result	YES

output

YES Problem 1: (VAR v_NonEmpty:S I:S P:S V:S V1:S V2:S X:S X1:S X2:S Y:S Z:S) (RULES U11(tt,V:S) -> U12(isNeList(activate(V:S))) U12(tt) -> tt U21(tt,V1:S,V2:S) -> U22(isList(activate(V1:S)),activate(V2:S)) U22(tt,V2:S) -> U23(isList(activate(V2:S))) U23(tt) -> tt U31(tt,V:S) -> U32(isQid(activate(V:S))) U32(tt) -> tt U41(tt,V1:S,V2:S) -> U42(isList(activate(V1:S)),activate(V2:S)) U42(tt,V2:S) -> U43(isNeList(activate(V2:S))) U43(tt) -> tt U51(tt,V1:S,V2:S) -> U52(isNeList(activate(V1:S)),activate(V2:S)) U52(tt,V2:S) -> U53(isList(activate(V2:S))) U53(tt) -> tt U61(tt,V:S) -> U62(isQid(activate(V:S))) U62(tt) -> tt U71(tt,V:S) -> U72(isNePal(activate(V:S))) U72(tt) -> tt __(__(X:S,Y:S),Z:S) -> __(X:S,__(Y:S,Z:S)) __(nil,X:S) -> X:S __(X:S,nil) -> X:S __(X1:S,X2:S) -> n____(X1:S,X2:S) a -> n__a activate(n____(X1:S,X2:S)) -> __(X1:S,X2:S) activate(n__a) -> a activate(n__and(X1:S,X2:S)) -> and(X1:S,X2:S) activate(n__e) -> e activate(n__i) -> i activate(n__isPalListKind(X:S)) -> isPalListKind(X:S) activate(n__nil) -> nil activate(n__o) -> o activate(n__u) -> u activate(X:S) -> X:S and(tt,X:S) -> activate(X:S) and(X1:S,X2:S) -> n__and(X1:S,X2:S) e -> n__e i -> n__i isList(n____(V1:S,V2:S)) -> U21(and(isPalListKind(activate(V1:S)),n__isPalListKind(activate(V2:S))),activate(V1:S),activate(V2:S)) isList(n__nil) -> tt isList(V:S) -> U11(isPalListKind(activate(V:S)),activate(V:S)) isNeList(n____(V1:S,V2:S)) -> U41(and(isPalListKind(activate(V1:S)),n__isPalListKind(activate(V2:S))),activate(V1:S),activate(V2:S)) isNeList(n____(V1:S,V2:S)) -> U51(and(isPalListKind(activate(V1:S)),n__isPalListKind(activate(V2:S))),activate(V1:S),activate(V2:S)) isNeList(V:S) -> U31(isPalListKind(activate(V:S)),activate(V:S)) isNePal(n____(I:S,__(P:S,I:S))) -> and(and(isQid(activate(I:S)),n__isPalListKind(activate(I:S))),n__and(isPal(activate(P:S)),n__isPalListKind(activate(P:S)))) isNePal(V:S) -> U61(isPalListKind(activate(V:S)),activate(V:S)) isPal(n__nil) -> tt isPal(V:S) -> U71(isPalListKind(activate(V:S)),activate(V:S)) isPalListKind(n____(V1:S,V2:S)) -> and(isPalListKind(activate(V1:S)),n__isPalListKind(activate(V2:S))) isPalListKind(n__a) -> tt isPalListKind(n__e) -> tt isPalListKind(n__i) -> tt isPalListKind(n__nil) -> tt isPalListKind(n__o) -> tt isPalListKind(n__u) -> tt isPalListKind(X:S) -> n__isPalListKind(X:S) isQid(n__a) -> tt isQid(n__e) -> tt isQid(n__i) -> tt isQid(n__o) -> tt isQid(n__u) -> tt nil -> n__nil o -> n__o u -> n__u ) Problem 1: Dependency Pairs Processor: -> Pairs: U11#(tt,V:S) -> U12#(isNeList(activate(V:S))) U11#(tt,V:S) -> ACTIVATE(V:S) U11#(tt,V:S) -> ISNELIST(activate(V:S)) U21#(tt,V1:S,V2:S) -> U22#(isList(activate(V1:S)),activate(V2:S)) U21#(tt,V1:S,V2:S) -> ACTIVATE(V1:S) U21#(tt,V1:S,V2:S) -> ACTIVATE(V2:S) U21#(tt,V1:S,V2:S) -> ISLIST(activate(V1:S)) U22#(tt,V2:S) -> U23#(isList(activate(V2:S))) U22#(tt,V2:S) -> ACTIVATE(V2:S) U22#(tt,V2:S) -> ISLIST(activate(V2:S)) U31#(tt,V:S) -> U32#(isQid(activate(V:S))) U31#(tt,V:S) -> ACTIVATE(V:S) U31#(tt,V:S) -> ISQID(activate(V:S)) U41#(tt,V1:S,V2:S) -> U42#(isList(activate(V1:S)),activate(V2:S)) U41#(tt,V1:S,V2:S) -> ACTIVATE(V1:S) U41#(tt,V1:S,V2:S) -> ACTIVATE(V2:S) U41#(tt,V1:S,V2:S) -> ISLIST(activate(V1:S)) U42#(tt,V2:S) -> U43#(isNeList(activate(V2:S))) U42#(tt,V2:S) -> ACTIVATE(V2:S) U42#(tt,V2:S) -> ISNELIST(activate(V2:S)) U51#(tt,V1:S,V2:S) -> U52#(isNeList(activate(V1:S)),activate(V2:S)) U51#(tt,V1:S,V2:S) -> ACTIVATE(V1:S) U51#(tt,V1:S,V2:S) -> ACTIVATE(V2:S) U51#(tt,V1:S,V2:S) -> ISNELIST(activate(V1:S)) U52#(tt,V2:S) -> U53#(isList(activate(V2:S))) U52#(tt,V2:S) -> ACTIVATE(V2:S) popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to TRS Standard