TRS Standard pair #487074022

details

property	value
status	complete
benchmark	append-hard.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n071.star.cs.uiowa.edu
space	CiME_04

run statistics

property	value
solver	ttt2-1.20
configuration	ttt2
runtime (wallclock)	0.796646 seconds
cpu usage	2.02076
user time	1.52835
system time	0.492408
max virtual memory	4173588.0
max residence set size	68884.0

stage attributes

key	value
starexec-result	YES

output

YES

Problem:
 is_empty(nil()) -> true()
 is_empty(cons(x,l)) -> false()
 hd(cons(x,l)) -> x
 tl(cons(x,l)) -> l
 append(l1,l2) -> ifappend(l1,l2,is_empty(l1))
 ifappend(l1,l2,true()) -> l2
 ifappend(l1,l2,false()) -> cons(hd(l1),append(tl(l1),l2))

Proof:
 DP Processor:
  DPs:
   append#(l1,l2) -> is_empty#(l1)
   append#(l1,l2) -> ifappend#(l1,l2,is_empty(l1))
   ifappend#(l1,l2,false()) -> tl#(l1)
   ifappend#(l1,l2,false()) -> append#(tl(l1),l2)
   ifappend#(l1,l2,false()) -> hd#(l1)
  TRS:
   is_empty(nil()) -> true()
   is_empty(cons(x,l)) -> false()
   hd(cons(x,l)) -> x
   tl(cons(x,l)) -> l
   append(l1,l2) -> ifappend(l1,l2,is_empty(l1))
   ifappend(l1,l2,true()) -> l2
   ifappend(l1,l2,false()) -> cons(hd(l1),append(tl(l1),l2))
  TDG Processor:
   DPs:
    append#(l1,l2) -> is_empty#(l1)
    append#(l1,l2) -> ifappend#(l1,l2,is_empty(l1))
    ifappend#(l1,l2,false()) -> tl#(l1)
    ifappend#(l1,l2,false()) -> append#(tl(l1),l2)
    ifappend#(l1,l2,false()) -> hd#(l1)
   TRS:
    is_empty(nil()) -> true()
    is_empty(cons(x,l)) -> false()
    hd(cons(x,l)) -> x
    tl(cons(x,l)) -> l
    append(l1,l2) -> ifappend(l1,l2,is_empty(l1))
    ifappend(l1,l2,true()) -> l2
    ifappend(l1,l2,false()) -> cons(hd(l1),append(tl(l1),l2))
   graph:
    ifappend#(l1,l2,false()) -> append#(tl(l1),l2) ->
    append#(l1,l2) -> ifappend#(l1,l2,is_empty(l1))
    ifappend#(l1,l2,false()) -> append#(tl(l1),l2) ->
    append#(l1,l2) -> is_empty#(l1)
    append#(l1,l2) -> ifappend#(l1,l2,is_empty(l1)) ->
    ifappend#(l1,l2,false()) -> hd#(l1)
    append#(l1,l2) -> ifappend#(l1,l2,is_empty(l1)) ->
    ifappend#(l1,l2,false()) -> append#(tl(l1),l2)
    append#(l1,l2) -> ifappend#(l1,l2,is_empty(l1)) -> ifappend#(l1,l2,false()) -> tl#(l1)
   SCC Processor:
    #sccs: 1
    #rules: 2
    #arcs: 5/25
    DPs:
     ifappend#(l1,l2,false()) -> append#(tl(l1),l2)
     append#(l1,l2) -> ifappend#(l1,l2,is_empty(l1))
    TRS:
     is_empty(nil()) -> true()
     is_empty(cons(x,l)) -> false()
     hd(cons(x,l)) -> x
     tl(cons(x,l)) -> l
     append(l1,l2) -> ifappend(l1,l2,is_empty(l1))
     ifappend(l1,l2,true()) -> l2
     ifappend(l1,l2,false()) -> cons(hd(l1),append(tl(l1),l2))
    Usable Rule Processor:
     DPs:
      ifappend#(l1,l2,false()) -> append#(tl(l1),l2)
      append#(l1,l2) -> ifappend#(l1,l2,is_empty(l1))
     TRS:
      tl(cons(x,l)) -> l
      is_empty(nil()) -> true()
      is_empty(cons(x,l)) -> false()
     Arctic Interpretation Processor:
      dimension: 1
      usable rules:
       tl(cons(x,l)) -> l
       is_empty(nil()) -> true()
       is_empty(cons(x,l)) -> false()
      interpretation:
       [false] = 1,
       
       [is_empty](x0) = x0,
       
       [cons](x0, x1) = x0 + 8x1 + 1,
       
       [nil] = 1,
       
       [append#](x0, x1) = 1x0 + 1,
       
       [ifappend#](x0, x1, x2) = x0 + x2 + 0,
       
       [tl](x0) = -8x0 + 0,
       
       [true] = 0
      orientation:
       ifappend#(l1,l2,false()) = l1 + 1 >= -7l1 + 1 = append#(tl(l1),l2)

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