SRS Standard pair #487083050

details

property	value
status	complete
benchmark	10.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n139.star.cs.uiowa.edu
space	Zantema_06

run statistics

property	value
solver	ttt2-1.20
configuration	ttt2
runtime (wallclock)	44.1398 seconds
cpu usage	172.91
user time	168.544
system time	4.36593
max virtual memory	1.1639572E7
max residence set size	102168.0

stage attributes

key	value
starexec-result	YES

output

YES

Problem:
 a(d(x1)) -> d(b(x1))
 a(x1) -> b(b(b(x1)))
 d(x1) -> x1
 a(x1) -> x1
 b(d(b(x1))) -> a(d(x1))
 b(c(x1)) -> c(d(d(x1)))
 a(c(x1)) -> b(b(c(d(x1))))

Proof:
 DP Processor:
  DPs:
   a#(d(x1)) -> b#(x1)
   a#(d(x1)) -> d#(b(x1))
   a#(x1) -> b#(x1)
   a#(x1) -> b#(b(x1))
   a#(x1) -> b#(b(b(x1)))
   b#(d(b(x1))) -> d#(x1)
   b#(d(b(x1))) -> a#(d(x1))
   b#(c(x1)) -> d#(x1)
   b#(c(x1)) -> d#(d(x1))
   a#(c(x1)) -> d#(x1)
   a#(c(x1)) -> b#(c(d(x1)))
   a#(c(x1)) -> b#(b(c(d(x1))))
  TRS:
   a(d(x1)) -> d(b(x1))
   a(x1) -> b(b(b(x1)))
   d(x1) -> x1
   a(x1) -> x1
   b(d(b(x1))) -> a(d(x1))
   b(c(x1)) -> c(d(d(x1)))
   a(c(x1)) -> b(b(c(d(x1))))
  TDG Processor:
   DPs:
    a#(d(x1)) -> b#(x1)
    a#(d(x1)) -> d#(b(x1))
    a#(x1) -> b#(x1)
    a#(x1) -> b#(b(x1))
    a#(x1) -> b#(b(b(x1)))
    b#(d(b(x1))) -> d#(x1)
    b#(d(b(x1))) -> a#(d(x1))
    b#(c(x1)) -> d#(x1)
    b#(c(x1)) -> d#(d(x1))
    a#(c(x1)) -> d#(x1)
    a#(c(x1)) -> b#(c(d(x1)))
    a#(c(x1)) -> b#(b(c(d(x1))))
   TRS:
    a(d(x1)) -> d(b(x1))
    a(x1) -> b(b(b(x1)))
    d(x1) -> x1
    a(x1) -> x1
    b(d(b(x1))) -> a(d(x1))
    b(c(x1)) -> c(d(d(x1)))
    a(c(x1)) -> b(b(c(d(x1))))
   graph:
    b#(d(b(x1))) -> a#(d(x1)) -> a#(c(x1)) -> b#(b(c(d(x1))))
    b#(d(b(x1))) -> a#(d(x1)) -> a#(c(x1)) -> b#(c(d(x1)))
    b#(d(b(x1))) -> a#(d(x1)) -> a#(c(x1)) -> d#(x1)
    b#(d(b(x1))) -> a#(d(x1)) -> a#(x1) -> b#(b(b(x1)))
    b#(d(b(x1))) -> a#(d(x1)) -> a#(x1) -> b#(b(x1))
    b#(d(b(x1))) -> a#(d(x1)) -> a#(x1) -> b#(x1)
    b#(d(b(x1))) -> a#(d(x1)) -> a#(d(x1)) -> d#(b(x1))
    b#(d(b(x1))) -> a#(d(x1)) -> a#(d(x1)) -> b#(x1)
    a#(c(x1)) -> b#(c(d(x1))) -> b#(c(x1)) -> d#(d(x1))
    a#(c(x1)) -> b#(c(d(x1))) -> b#(c(x1)) -> d#(x1)
    a#(c(x1)) -> b#(c(d(x1))) -> b#(d(b(x1))) -> a#(d(x1))
    a#(c(x1)) -> b#(c(d(x1))) -> b#(d(b(x1))) -> d#(x1)
    a#(c(x1)) -> b#(b(c(d(x1)))) -> b#(c(x1)) -> d#(d(x1))
    a#(c(x1)) -> b#(b(c(d(x1)))) -> b#(c(x1)) -> d#(x1)
    a#(c(x1)) -> b#(b(c(d(x1)))) -> b#(d(b(x1))) -> a#(d(x1))
    a#(c(x1)) -> b#(b(c(d(x1)))) -> b#(d(b(x1))) -> d#(x1)
    a#(d(x1)) -> b#(x1) -> b#(c(x1)) -> d#(d(x1))
    a#(d(x1)) -> b#(x1) -> b#(c(x1)) -> d#(x1)
    a#(d(x1)) -> b#(x1) -> b#(d(b(x1))) -> a#(d(x1))
    a#(d(x1)) -> b#(x1) -> b#(d(b(x1))) -> d#(x1)
    a#(x1) -> b#(b(b(x1))) -> b#(c(x1)) -> d#(d(x1))
    a#(x1) -> b#(b(b(x1))) -> b#(c(x1)) -> d#(x1)
    a#(x1) -> b#(b(b(x1))) -> b#(d(b(x1))) -> a#(d(x1))
    a#(x1) -> b#(b(b(x1))) -> b#(d(b(x1))) -> d#(x1)
    a#(x1) -> b#(b(x1)) -> b#(c(x1)) -> d#(d(x1))
    a#(x1) -> b#(b(x1)) -> b#(c(x1)) -> d#(x1)
    a#(x1) -> b#(b(x1)) -> b#(d(b(x1))) -> a#(d(x1))
    a#(x1) -> b#(b(x1)) -> b#(d(b(x1))) -> d#(x1)
    a#(x1) -> b#(x1) -> b#(c(x1)) -> d#(d(x1))
    a#(x1) -> b#(x1) -> b#(c(x1)) -> d#(x1)
    a#(x1) -> b#(x1) -> b#(d(b(x1))) -> a#(d(x1))
    a#(x1) -> b#(x1) -> b#(d(b(x1))) -> d#(x1)
   EDG Processor:
    DPs:
     a#(d(x1)) -> b#(x1)
     a#(d(x1)) -> d#(b(x1))
     a#(x1) -> b#(x1)
     a#(x1) -> b#(b(x1))
     a#(x1) -> b#(b(b(x1)))
     b#(d(b(x1))) -> d#(x1)
     b#(d(b(x1))) -> a#(d(x1))
     b#(c(x1)) -> d#(x1)
     b#(c(x1)) -> d#(d(x1))

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