details

property	value
status	complete
benchmark	aaabaaaaa-aaaaaaaabaaab.srs.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n144.star.cs.uiowa.edu
space	Wenzel_16

run statistics

property	value
solver	MultumNonMulta 20 June 2020 20G sparse
configuration	default
runtime (wallclock)	2.77452 seconds
cpu usage	9.53427
user time	8.92762
system time	0.606651
max virtual memory	2.5854944E7
max residence set size	1421304.0

stage attributes

key	value
starexec-result	YES

output

YES After renaming modulo { a->0, b->1 }, it remains to prove termination of the 1-rule system { 0 0 0 1 0 0 0 0 0 -> 0 0 0 0 0 0 0 0 1 0 0 0 1 } The system was reversed. After renaming modulo { 0->0, 1->1 }, it remains to prove termination of the 1-rule system { 0 0 0 0 0 1 0 0 0 -> 1 0 0 0 1 0 0 0 0 0 0 0 0 } Applying the dependency pairs transformation. After renaming modulo { (0,true)->0, (0,false)->1, (1,false)->2 }, it remains to prove termination of the 12-rule system { 0 1 1 1 1 2 1 1 1 -> 0 1 1 2 1 1 1 1 1 1 1 1 , 0 1 1 1 1 2 1 1 1 -> 0 1 2 1 1 1 1 1 1 1 1 , 0 1 1 1 1 2 1 1 1 -> 0 2 1 1 1 1 1 1 1 1 , 0 1 1 1 1 2 1 1 1 -> 0 1 1 1 1 1 1 1 , 0 1 1 1 1 2 1 1 1 -> 0 1 1 1 1 1 1 , 0 1 1 1 1 2 1 1 1 -> 0 1 1 1 1 1 , 0 1 1 1 1 2 1 1 1 -> 0 1 1 1 1 , 0 1 1 1 1 2 1 1 1 -> 0 1 1 1 , 0 1 1 1 1 2 1 1 1 -> 0 1 1 , 0 1 1 1 1 2 1 1 1 -> 0 1 , 0 1 1 1 1 2 1 1 1 -> 0 , 1 1 1 1 1 2 1 1 1 ->= 2 1 1 1 2 1 1 1 1 1 1 1 1 } The system was filtered by the following matrix interpretation of type E_J with J = {1,...,2} and dimension 10: 0 is interpreted by / \ | 1 0 1 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | \ / 1 is interpreted by / \ | 1 0 0 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 0 | | 0 0 0 1 0 0 0 0 0 0 | | 0 0 0 0 2 0 0 0 0 0 | | 0 0 0 0 0 1 0 0 0 0 | | 0 0 0 0 0 0 1 0 0 0 | | 0 0 1 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 1 1 | | 0 0 0 0 0 0 0 0 0 1 | | 0 1 1 1 0 1 0 0 0 0 | \ / 2 is interpreted by / \ | 1 0 0 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 1 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | \ / After renaming modulo { 1->0, 2->1 }, it remains to prove termination of the 1-rule system { 0 0 0 0 0 1 0 0 0 ->= 1 0 0 0 1 0 0 0 0 0 0 0 0 } The system is trivially terminating. popout

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all output return to SRS Standard