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SRS Standard pair #487089887
details
property
value
status
complete
benchmark
abaaaaaa-aaaaaaabaaab.srs.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n141.star.cs.uiowa.edu
space
Wenzel_16
run statistics
property
value
solver
MultumNonMulta 20 June 2020 20G sparse
configuration
default
runtime (wallclock)
5.56304 seconds
cpu usage
20.5494
user time
19.7991
system time
0.750258
max virtual memory
2.5853728E7
max residence set size
1754872.0
stage attributes
key
value
starexec-result
YES
output
YES After renaming modulo { a->0, b->1 }, it remains to prove termination of the 1-rule system { 0 1 0 0 0 0 0 0 -> 0 0 0 0 0 0 0 1 0 0 0 1 } The system was filtered by the following matrix interpretation of type E_J with J = {1,...,2} and dimension 9: 0 is interpreted by / \ | 1 0 1 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 | | 0 0 1 0 1 0 0 0 0 | | 0 0 0 0 0 1 0 0 0 | | 0 0 1 0 0 0 1 0 0 | | 0 0 0 0 0 0 0 1 0 | | 0 0 0 0 0 0 0 0 1 | | 0 1 0 2 0 0 0 0 0 | \ / 1 is interpreted by / \ | 1 0 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 | | 0 0 0 1 0 0 0 0 0 | | 0 0 0 1 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 1 0 0 0 | | 0 0 0 0 0 0 0 0 0 | | 0 0 0 1 0 0 0 0 0 | | 0 0 0 0 0 1 0 0 0 | \ / After renaming modulo { }, it remains to prove termination of the 0-rule system { } The system is trivially terminating.
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