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SRS Standard pair #487089917
details
property
value
status
complete
benchmark
abaaaaaaa-aaaaaaaabaabab.srs.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n150.star.cs.uiowa.edu
space
Wenzel_16
run statistics
property
value
solver
MultumNonMulta 20 June 2020 20G sparse
configuration
default
runtime (wallclock)
30.0513 seconds
cpu usage
116.412
user time
113.572
system time
2.84026
max virtual memory
5.158638E7
max residence set size
9573920.0
stage attributes
key
value
starexec-result
YES
output
YES After renaming modulo { a->0, b->1 }, it remains to prove termination of the 1-rule system { 0 1 0 0 0 0 0 0 0 -> 0 0 0 0 0 0 0 0 1 0 0 1 0 1 } The system was filtered by the following matrix interpretation of type E_J with J = {1,...,2} and dimension 10: 0 is interpreted by / \ | 1 0 1 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 1 0 1 0 0 0 0 0 | | 0 0 0 0 0 1 0 0 0 0 | | 0 0 0 0 0 0 3 0 0 0 | | 0 0 1 0 0 0 0 1 0 0 | | 0 0 0 0 0 0 0 0 1 0 | | 0 0 1 0 0 0 0 0 0 1 | | 0 1 1 1 0 0 0 0 0 0 | \ / 1 is interpreted by / \ | 1 0 0 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 0 | | 0 0 0 1 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 1 0 0 0 0 0 0 | | 0 0 0 1 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 1 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | \ / After renaming modulo { }, it remains to prove termination of the 0-rule system { } The system is trivially terminating.
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