details

property	value
status	complete
benchmark	abcabbcab-abbcabcabbca.srs.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n148.star.cs.uiowa.edu
space	Wenzel_16

run statistics

property	value
solver	MultumNonMulta 20 June 2020 20G sparse
configuration	default
runtime (wallclock)	1.05248 seconds
cpu usage	2.83928
user time	2.4609
system time	0.378377
max virtual memory	2.5650932E7
max residence set size	816312.0

stage attributes

key	value
starexec-result	YES

output

YES After renaming modulo { a->0, b->1, c->2 }, it remains to prove termination of the 1-rule system { 0 1 2 0 1 1 2 0 1 -> 0 1 1 2 0 1 2 0 1 1 2 0 } The system was reversed. After renaming modulo { 1->0, 0->1, 2->2 }, it remains to prove termination of the 1-rule system { 0 1 2 0 0 1 2 0 1 -> 1 2 0 0 1 2 0 1 2 0 0 1 } Applying the dependency pairs transformation. After renaming modulo { (0,true)->0, (1,false)->1, (2,false)->2, (0,false)->3 }, it remains to prove termination of the 6-rule system { 0 1 2 3 3 1 2 3 1 -> 0 3 1 2 3 1 2 3 3 1 , 0 1 2 3 3 1 2 3 1 -> 0 1 2 3 1 2 3 3 1 , 0 1 2 3 3 1 2 3 1 -> 0 1 2 3 3 1 , 0 1 2 3 3 1 2 3 1 -> 0 3 1 , 0 1 2 3 3 1 2 3 1 -> 0 1 , 3 1 2 3 3 1 2 3 1 ->= 1 2 3 3 1 2 3 1 2 3 3 1 } The system was filtered by the following matrix interpretation of type E_J with J = {1,...,2} and dimension 10: 0 is interpreted by / \ | 1 0 1 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | \ / 1 is interpreted by / \ | 1 0 0 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 0 | | 0 0 0 1 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 1 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 1 0 1 0 0 0 0 0 0 | \ / 2 is interpreted by / \ | 1 0 0 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 2 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 1 0 0 1 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | \ / 3 is interpreted by / \ | 1 0 0 0 0 0 0 0 0 0 | | 0 1 0 0 0 0 0 0 0 0 | | 0 0 1 0 0 0 0 0 0 1 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 1 0 0 0 0 | | 0 0 0 0 0 0 1 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 0 | | 0 0 0 0 0 0 0 0 0 1 | | 0 0 2 0 0 0 0 0 0 0 | \ / After renaming modulo { 3->0, 1->1, 2->2 }, it remains to prove termination of the 1-rule system { 0 1 2 0 0 1 2 0 1 ->= 1 2 0 0 1 2 0 1 2 0 0 1 } The system is trivially terminating. popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard