details

property	value
status	complete
benchmark	z002.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n184.star.cs.uiowa.edu
space	Zantema_04

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	1.70026 seconds
cpu usage	3.83475
user time	3.6525
system time	0.182255
max virtual memory	1.8744356E7
max residence set size	253816.0

stage attributes

key	value
starexec-result	YES

output

YES proof of /export/starexec/sandbox2/benchmark/theBenchmark.xml # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) QTRS Reverse [EQUIVALENT, 0 ms] (2) QTRS (3) RFCMatchBoundsTRSProof [EQUIVALENT, 0 ms] (4) YES ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: b(c(a(x1))) -> a(b(a(b(x1)))) b(x1) -> c(c(x1)) a(a(x1)) -> a(c(b(a(x1)))) Q is empty. ---------------------------------------- (1) QTRS Reverse (EQUIVALENT) We applied the QTRS Reverse Processor [REVERSE]. ---------------------------------------- (2) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: a(c(b(x1))) -> b(a(b(a(x1)))) b(x1) -> c(c(x1)) a(a(x1)) -> a(b(c(a(x1)))) Q is empty. ---------------------------------------- (3) RFCMatchBoundsTRSProof (EQUIVALENT) Termination of the TRS R could be shown with a Match Bound [MATCHBOUNDS1,MATCHBOUNDS2] of 2. This implies Q-termination of R. The following rules were used to construct the certificate: a(c(b(x1))) -> b(a(b(a(x1)))) b(x1) -> c(c(x1)) a(a(x1)) -> a(b(c(a(x1)))) The certificate found is represented by the following graph. The certificate consists of the following enumerated nodes: 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50 Node 30 is start node and node 31 is final node. Those nodes are connected through the following edges: * 30 to 32 labelled b_1(0)* 30 to 35 labelled c_1(0)* 30 to 36 labelled a_1(0)* 30 to 39 labelled c_1(1)* 31 to 31 labelled #_1(0)* 32 to 33 labelled a_1(0)* 33 to 34 labelled b_1(0)* 33 to 40 labelled c_1(1)* 34 to 31 labelled a_1(0)* 34 to 42 labelled b_1(1)* 34 to 45 labelled a_1(1)* 34 to 48 labelled c_1(2)* 35 to 31 labelled c_1(0)* 36 to 37 labelled b_1(0)* 36 to 41 labelled c_1(1)* 37 to 38 labelled c_1(0)* 38 to 31 labelled a_1(0)* 38 to 42 labelled b_1(1)* 38 to 45 labelled a_1(1)* 38 to 48 labelled c_1(2)* 39 to 32 labelled c_1(1)* 40 to 34 labelled c_1(1)* 41 to 37 labelled c_1(1)* 42 to 43 labelled a_1(1)* 43 to 44 labelled b_1(1)* 43 to 49 labelled c_1(2)* 44 to 31 labelled a_1(1)* 44 to 42 labelled b_1(1)* 44 to 45 labelled a_1(1)* 44 to 48 labelled c_1(2)* 45 to 46 labelled b_1(1)* 45 to 50 labelled c_1(2)* 46 to 47 labelled c_1(1)* 47 to 31 labelled a_1(1)* 47 to 42 labelled b_1(1)* 47 to 45 labelled a_1(1)* 47 to 48 labelled c_1(2)* 48 to 42 labelled c_1(2)* 49 to 44 labelled c_1(2)* 50 to 46 labelled c_1(2) ---------------------------------------- (4) YES popout

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job log

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all output return to SRS Standard