details

property	value
status	complete
benchmark	OvConsOS_nokinds_noand_GM.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n144.star.cs.uiowa.edu
space	Transformed_CSR_innermost_04

run statistics

property	value
solver	AProVE
configuration	standard
runtime (wallclock)	5.16847 seconds
cpu usage	15.4366
user time	14.7328
system time	0.703792
max virtual memory	3.7255044E7
max residence set size	1450836.0

stage attributes

key	value
starexec-result	YES

output

YES proof of /export/starexec/sandbox/benchmark/theBenchmark.xml # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) DependencyPairsProof [EQUIVALENT, 127 ms] (2) QDP (3) DependencyGraphProof [EQUIVALENT, 0 ms] (4) AND (5) QDP (6) UsableRulesProof [EQUIVALENT, 0 ms] (7) QDP (8) QReductionProof [EQUIVALENT, 0 ms] (9) QDP (10) QDPSizeChangeProof [EQUIVALENT, 0 ms] (11) YES (12) QDP (13) QDPOrderProof [EQUIVALENT, 289 ms] (14) QDP (15) DependencyGraphProof [EQUIVALENT, 0 ms] (16) AND (17) QDP (18) QDPOrderProof [EQUIVALENT, 149 ms] (19) QDP (20) DependencyGraphProof [EQUIVALENT, 0 ms] (21) QDP (22) UsableRulesProof [EQUIVALENT, 0 ms] (23) QDP (24) QReductionProof [EQUIVALENT, 0 ms] (25) QDP (26) QDPSizeChangeProof [EQUIVALENT, 0 ms] (27) YES (28) QDP (29) QDPOrderProof [EQUIVALENT, 114 ms] (30) QDP (31) DependencyGraphProof [EQUIVALENT, 0 ms] (32) TRUE ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: a__zeros -> cons(0, zeros) a__U11(tt) -> tt a__U21(tt) -> tt a__U31(tt) -> tt a__U41(tt, V2) -> a__U42(a__isNatIList(V2)) a__U42(tt) -> tt a__U51(tt, V2) -> a__U52(a__isNatList(V2)) a__U52(tt) -> tt a__U61(tt, V2) -> a__U62(a__isNatIList(V2)) a__U62(tt) -> tt a__U71(tt, L, N) -> a__U72(a__isNat(N), L) a__U72(tt, L) -> s(a__length(mark(L))) a__U81(tt) -> nil a__U91(tt, IL, M, N) -> a__U92(a__isNat(M), IL, M, N) a__U92(tt, IL, M, N) -> a__U93(a__isNat(N), IL, M, N) a__U93(tt, IL, M, N) -> cons(mark(N), take(M, IL)) a__isNat(0) -> tt a__isNat(length(V1)) -> a__U11(a__isNatList(V1)) a__isNat(s(V1)) -> a__U21(a__isNat(V1)) a__isNatIList(V) -> a__U31(a__isNatList(V)) a__isNatIList(zeros) -> tt a__isNatIList(cons(V1, V2)) -> a__U41(a__isNat(V1), V2) a__isNatList(nil) -> tt a__isNatList(cons(V1, V2)) -> a__U51(a__isNat(V1), V2) a__isNatList(take(V1, V2)) -> a__U61(a__isNat(V1), V2) a__length(nil) -> 0 a__length(cons(N, L)) -> a__U71(a__isNatList(L), L, N) a__take(0, IL) -> a__U81(a__isNatIList(IL)) a__take(s(M), cons(N, IL)) -> a__U91(a__isNatIList(IL), IL, M, N) mark(zeros) -> a__zeros mark(U11(X)) -> a__U11(mark(X)) mark(U21(X)) -> a__U21(mark(X)) mark(U31(X)) -> a__U31(mark(X)) mark(U41(X1, X2)) -> a__U41(mark(X1), X2) mark(U42(X)) -> a__U42(mark(X)) mark(isNatIList(X)) -> a__isNatIList(X) mark(U51(X1, X2)) -> a__U51(mark(X1), X2) mark(U52(X)) -> a__U52(mark(X)) mark(isNatList(X)) -> a__isNatList(X) mark(U61(X1, X2)) -> a__U61(mark(X1), X2) mark(U62(X)) -> a__U62(mark(X)) mark(U71(X1, X2, X3)) -> a__U71(mark(X1), X2, X3) mark(U72(X1, X2)) -> a__U72(mark(X1), X2) mark(isNat(X)) -> a__isNat(X) mark(length(X)) -> a__length(mark(X)) mark(U81(X)) -> a__U81(mark(X)) mark(U91(X1, X2, X3, X4)) -> a__U91(mark(X1), X2, X3, X4) mark(U92(X1, X2, X3, X4)) -> a__U92(mark(X1), X2, X3, X4) mark(U93(X1, X2, X3, X4)) -> a__U93(mark(X1), X2, X3, X4) mark(take(X1, X2)) -> a__take(mark(X1), mark(X2)) mark(cons(X1, X2)) -> cons(mark(X1), X2) popout

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job log

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actions

all output return to TRS Innermost