details

property	value
status	complete
benchmark	tailrecgen.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n142.star.cs.uiowa.edu
space	Mixed_HO_12

run statistics

property	value
solver	Wanda 2.2a
configuration	default
runtime (wallclock)	10.6798 seconds
cpu usage	10.6458
user time	10.3915
system time	0.254278
max virtual memory	512088.0
max residence set size	172376.0

stage attributes

key	value
starexec-result	MAYBE

output

MAYBE We consider the system theBenchmark. Alphabet: !plus : [nat * nat] --> nat 0 : [] --> nat dec : [nat * nat] --> nat grec : [nat * nat * nat * nat -> nat -> nat] --> nat log2 : [nat * nat] --> nat s : [nat] --> nat sumlog : [nat] --> nat Rules: dec(0, x) => 0 dec(x, 0) => x dec(s(x), s(y)) => dec(x, y) grec(0, x, y, f) => y grec(s(x), s(y), z, f) => grec(dec(x, y), s(y), f z x, f) sumlog(x) => grec(x, s(s(0)), 0, /\y./\z.!plus(log2(s(z), 0), y)) !plus(0, x) => x !plus(s(x), y) => s(!plus(x, y)) log2(s(0), 0) => 0 log2(0, s(x)) => s(log2(s(x), 0)) log2(s(0), s(x)) => s(log2(s(x), 0)) log2(s(s(x)), y) => log2(x, s(y)) This AFS is converted to an AFSM simply by replacing all free variables by meta-variables (with arity 0). popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to Higher Order Rewriting Union Beta